NEC PD75P308 user manual NON Port Pins

B

μPD75P308

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1.2 NON PORT PINS

				Also Served			Input/
Pin Name			Input/Output		Function	When Reset	Output
				As			Circuit
							TYPE*1
		TI0	Input	P13	Timer/event counter external event pulse input	—	B -C
	PTO0		Output	P20	Timer/event counter output	Input	E-B
		PCL	Input/Output	P22	Clock output	Input	E-B
		BUZ	Input/Output	P23	Fixed frequency output (for buzzer or for trimming	Input	E-B
					the system clock)
			Input/Output	P01	Serial clock input/output	Input	F	-A
		SCK
SO/SB0			Input/Output	P02	Serial data output	Input	F -B
					Serial bus input/output
	SI/SB1		Input/Output	P03	Serial data input	Input	M -C
					Serial bus input/output
	INT4		Input	P00	Edge detection vector interrupt input (either rising	—
					or falling edge detection is effective)
	INT0		Input	P10	Edge detection vector interrupt input (detection	—	B -C
	INT1			P11	edge can be selected)
	INT2		Input	P12	Edge detection testable input (rising edge detection)	—	B -C
KR0-KR3			Input/Output	P60-P63	Testable input/output(parallel falling edge detection)	Input	F	-A
KR4-KR7			Input/Output	P70-P73	Testable input/output(parallel falling edge detection)	Input	F	-A
	S0-S23		Output	—	Segment signal output	*3	G-A
S24-S31			Output	BP0-7	Segment signal output	*3	G-C
	COM0-		Output	—	Common signal output	*3	G-B
	COM3
VLC0-VLC2			—	—	LCD drive power	—		—
	BIAS		—	—	External dividing resistor disconnect output	High-impedance		—
LCDCL*2			Input/Output	P30	Externally expanded driver clock output	Input	E-B
	SYNC*2		Input/Output	P31	Externally expanded driver sync clock output	Input	E-B
					To connect the crystal/ceramic oscillator to the main
	X1, X2		Input	—	system clock generator.	—		—
					When inputting the external clock, input the external
					clock to pin X1, and the reverse phase of the
					external clock to pin X2.
		XT1	Input	—	To connect the crystal oscillator to the subsystem
					clock generator.
					When the external clock is used, in XT1 inputs the	—		—
		XT2	—	—	external clock. In this case, pin XT2 must be left
					open.
					Pin XT1 can be used as a 1-bit input (test) pin.
			Input	—	System reset input (low level active)	—		B
	RESET
MD0-MD3			Input/Output	P30-P33	To select mode when writing/verifying of program	Input	E-B
					memory (PROM)
					Program voltage application when writing and
		VPP	—	—	verifying of program memory (PROM)	—		—
					Connect to VDD during the normal operation
					Apply +12.5V when writing/verifying EPROM
		VDD	—	—	Positive power supply	—		—
		VSS	—	—	GND	—		—

*1: Circles indicate schmitt trigger inputs.

2:These pins are provided for future system expansion. At present, these pins are used only as pins P30 and P31.

3:For these display output, VLCX indicated below are selected as the input source.

S0 to S31: VLC1, COM0 to COM2: VLC2, COM3: VLC0

However, display output level varies depending on the particular display output and VLCX external circuit.

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