NEC PD75P308 PD75P308

PD75P308

BLOCK DIAGRAM

P00-P03

P10-P13

P20-P23

P30-P33

/MD0-MD3

P40-P43

P50-P53

P60-P63

P70-P73

PORT0

PORT1

PORT2

PORT3

PORT4

PORT5

PORT6

PORT7

S0-S23

S24/BP0

-S31/BP7

COM0-COM3

V -V

LCO LC2

BIAS

LCDCL/P30

SYNC/P30

LCD

CONTROLLER

/DRIVER

fLCD

RESET

SP(8)

BANK

GENERAL REG.

DATA

MEMORY

(RAM)

512 x 4 BITS

ALU

VSS

VDD

VPP

DECODE

AND

CONTROL

PROGRAM

MEMORY

(PROM)

8064 x 8 BITS

PROGRAM

COUNTER(13)

STAND BY

CONTROL

SYSTEM CLOCK

GENERATOR

CLOCK

DIVIDER

CLOCK

OUTPUT

CONTROL SUB MAIN

f /2

X1XT2

XT1

PCL/P22

CPU

CLOCK

INTERRUPT

CONTROL

BIT SEQ.

BUFFER(16)

SERIAL

INTERFACE

WATCH

TIMER

TIMER/EVENT

COUNTER

BASIC

INTERVAL

TIMER

TI0/P13

PTO0/P20

BUZ/P23

SI/SBI/P03

SO/SB0/P02

SCK/P01

INTBT

INTT0

INTW

INTCSI

INT0/P10

INT1/P11

INT2/P12

INT4/P00

KR0/P60-

KR3/P63,

KR4/P70-

KR7/P73

LCD

Contents

Main DATA SHEET MOS INTEGRATED CIRCUIT PIN CONFIGURATION PD75P308GF-3B9 PD75P308K PD75P308 BLOCK DIAGRAM Page PD75P308 1. PIN FUNCTIONS 1.1 PORT PINS 1.2 NON PORT PINS Page PD75P308 TYPE F P.U.R. : PullUp Resistor TYPE GA TYPE GC Page 2. DIFFERENCES BETWEEN PD75P308 AND Note: PD75P308 and Table 2-1 Differences between 3. WRITING AND VERIFYING PROM (PROGRAM MEMORY) Page Page Note 1: Remarks: 4. ELECTRICAL SPECIFICATIONS Effective value = Peak value x Duty *1: ABSOLUTE MAXIMUM RATINGS Page Page DC CHARACTERISTICS (Ta = -10 to +70C, VDD = 5V 5%) AC CHARACTERISTICS (Ta = -10 to + 70C, VDD = 5V 5%) Operation Other Than Serial Transfer SERIAL TRANSFER OPERATION TWO-LINE AND THREE-LINE SERIAL I/O MODES (SCK: internal clock output) TWO-LINE AND THREE-LINE SERIAL I/O MODES (SCK: external clock input) SBI MODE (SCK: internal clock output (master)) SBI MODE (SCK: external clock output (master)) AC TIMING TEST POINT (excluding X1 and XT1 inputs) CLOCK TIMING TI0 TIMING SERIAL TRANSFER TIMING THREE-LINE SERIAL I/O MODE: TWO-LINE SERIAL I/O MODE: SERIAL TRANSFER TIMING BUS RELEASE SIGNAL TRANSFER INTERRUPT INPUT TIMING t RESET INPUT TIMING COMMAND SIGNAL TRANSFER LOW-VOLTAGE DATA RETENTION CHARACTERISTICS OF DATA MEMORY IN STOP MODE (Ta = -10 to +70C) DATA RETENTION TIMING (releasing STOP mode by RESET) DATA RETENTION TIMING (standby release signal: releasing STOP mode by interrupt) *1: These symbols are the corresponding AC PROGRAMMING CHARACTERISTICS (Ta = 255C, VDD = 6.00.25V, VPP = 12.50.3V, VSS = 0V) DC PROGRAMMING CHARACTERISTICS (Ta = 25 5C, VDD = 6.00.25V, VPP = 12.50.3V, VSS = 0V) PROGRAM MEMORY WRITE TIMING PROGRAM MEMORY READ TIMING 5. PACKAGE DRAWINGS 80 PIN PLASTIC QFP (1420) 80 PIN CERAMIC WQFN PD75P308 6. RECOMMENDED SOLDERING CONDITIONS *: Table 6-1 Soldering Conditions APPENDIX A. DEVELOPMENT TOOLS PROM writing tools Page GENERAL NOTES ON CMOS DEVICES 1 STATIC ELECTRICITY (ALL MOS DEVICES) 2 PROCESSING OF UNUSED PINS (CMOS DEVICES ONLY) 3 STATUS BEFORE INITIALIZATION (ALL MOS DEVICES) [MEMO]