Quatech MPAP-100 user manual

To make the external FIFOs more useful in byte-synchronous modes, the MPAP-100 can watch for a given character to be transferred consecutively a specific number of times from the SCC into the receive FIFO. When this occurs, the RX_PAT bit in the Interrupt Status Register (see page 43) is set. For instance, the MPAP-100 can watch for the end-of-text character to be received, or for three consecutive pad characters to be received.

For byte-synchronous operation with simple unique markers in the data stream, this feature may be quite useful. Even if it is not, however, the MPAP-100 can certainly be operated with per-character interrupts enabled and the external FIFOs disabled. The tradeoff will be a heavier interrupt burden and possibly somewhat lower throughput.

NOTE

While most useful in byte-synchronous modes, the receive pattern detection feature can be used in any operational mode.