S3C8245/P8245/C8249/P8249 CONTROL REGISTER
4-43
T1CON Timer 1 Control Register FBHSet 1, Bank 1
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
nRESET Value 00000000
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Addressing Mode Register addressing mode only
.7–.5 Timer 1 Input Clock Selection Bits
000fxx/1024
010fxx/256
100fxx/64
110fxx/8
001fxx/1
011External clock (T1CLK) falling edge
101External clock (T1CLK) rising edge
111Counter stop
.4–.3 Timer 1 Operating Mode Selection Bits
0 0 Interval mode
0 1 Capture mode (Capture on rising edge, counter running, OVF can occur)
1 0 Capture mode (Capture on falling edge, counter running, OVF can occur)
1 1 PWM mode (OVF & match interrupt can occur)
.2 Timer 1 Counter Enable Bit
0No effect
1Clear the timer 1 counter (when write)
.1 Timer 1 Match/Capture Interrupt Enable Bit
0Disable interrupt
1Enable interrupt
.0 Timer 1 Overflow Interrupt Enable
0Disable overflow interrupt
1Enable overflow interrupt