S3C8245/P8245/C8249/P8249 INSTRUCTION SET
6-57
LDCPD/LDEPD Load Memory with Pre-Decrement
LDCPD/
LDEPD dst,src
Operation: rr rr – 1
dst src
These instructions are used for block transfers of data from program or data memory from the
register file. The address of the memory location is specified by a working register pair and is first
decremented. The contents of the source location are then loaded into the destination location. The
contents of the source are unaffected.
LDCPD refers to program memory and LDEPD refers to external data memory. The assembler
makes 'Irr' an even number for program memory and an odd number for external data memory.
Flags: No flags are affected.
Format:
Bytes Cycles Opcode
(Hex) Addr Mode
dst src
opc src | dst 2 14 F2 Irr r
Examples: Given: R0 = 77H, R6 = 30H, and R7 = 00H:
LDCPD @RR6,R0 ;(RR6 RR6 – 1)
;77H (contents of R0) is loaded into program memory location
;2FFFH (3000H – 1H)
;R0 = 77H, R6 = 2FH, R7 = 0FFH
LDEPD @RR6,R0 ;(RR6 RR6 – 1)
;77H (contents of R0) is loaded into external data memory
;location 2FFFH (3000H – 1H)
;R0 = 77H, R6 = 2FH, R7 = 0FFH