Samsung C8249, P8245, P8249, S3C8245 - page 33

S3C8245/P8245/C8249/P8249 PRODUCT OVERVIEW
1-7
Table 1-1. S3C8245/C8249 Pin Descriptions (Continued)
Pin
Names Pin Type Pin Description Circuit Type Pin
Numbers (note) Share
Pins
ADC0–ADC6
ADC7 IA/D converter analog input channels F–10 F–18 36–42 43 P2.0–P2.6 P2.7
AVREF –A/D converter reference voltage – 44 –
AVSS –A/D converter ground – 45 –
INT0–INT7 IExternal interrupt input pins D–4 20–27 P0.0–P0.7
nRESET ISystem reset pin
(pull-up resistor: 250 kΩ)B19 –
TEST I0 V: Normal MCU operating
5 V: Test mode
12 V: for OTP writing
– 16 –
SDAT, SCLK OSerial OTP interface pins; serial data
and clock D–2 10, 11 P3.3, P3.4
VDD, VSS –Power input pins for CPU operation
(internal) and Power input for OTP
Writing
–12, 13 –
XOUT, XIN –Main oscillator pins –14, 15 –
SO, SCK, SI I/O Serial I/O interface clock signal E–2 33–35 P1.5–P1.7
VVLDREF IVoltage detector reference voltage input F–18 43 P2.7
TACAP ITimer A Capture input D–2 10 P3.3
TACLK ITimer A External clock input D–2 9P3.2
TAOUT/TAPWM OTimer A output and PWM output D–2 8P3.1
TBPWM OTimer B PWM output D–2 7P3.0
T1CAP ITimer 1 Capture input E–2 28 P1.0
T1CLK ITimer 1 External clock input E–2 29 P1.1
T1OUT/T1PWM OTimer 1 output and PWM output E–2 30 P1.2
COM0–COM3 OLCD common signal output H51–54 –
SEG0–SEG15 OLCD segment output H55–70 –
SEG16–SEG23 OLCD segment output H–14 71–78 P4.0–P4.7
SEG24–SEG31 OLCD Segment output H–14 79–6 P5.0–P5.7
VLC0–VLC2 OLCD power supply – 48–50 –
BUZ O0.5, 1, 2 or 4 kHz frequency output for
buzzer sound with 4.19 MHz main
system clock or 32768 Hz subsystem
clock
E–2 32 P1.4
CA, CB –Capacitor terminal for voltage booster – 46–47 –