S3C8245/P8245/C8249/P8249 INSTRUCTION SET
6-33
DA — Decimal Adjust
DA dst
Operation: dst ← DA dst
The destination operand is adjusted to form two 4-bit BCD digits following an addition or subtraction
operation. For addition (ADD, ADC) or subtraction (SUB, SBC), the following table indicates the
operation performed. (The operation is undefined if the destination operand was not the result of a
valid addition or subtraction of BCD digits):
Instruction Carry
Before DA Bits 4–7
Value (Hex) H Flag
Before DA Bits 0–3
Value (Hex) Number Added
to Byte Carry
After DA
0 0–9 0 0–9 00 0
0 0–8 0 A–F 06 0
0 0–9 1 0–3 06 0
ADD 0A–F 0 0–9 60 1
ADC 09–F 0A–F 66 1
0A–F 1 0–3 66 1
1 0–2 0 0–9 60 1
1 0–2 0 A–F 66 1
1 0–3 1 0–3 66 1
0 0–9 0 0–9 00 = – 00 0
SUB 0 0–8 1 6–F FA = – 06 0
SBC 17–F 0 0–9 A0 = – 60 1
16–F 16–F 9A = – 66 1
Flags: C: Set if there was a carry from the most significant bit; cleared otherwise (see table).
Z: Set if result is "0"; cleared otherwise.
S: Set if result bit 7 is set; cleared otherwise.
V: Undefined.
D: Unaffected.
H: Unaffected.
Format:
Bytes Cycles Opcode
(Hex) Addr Mode
dst
opc dst 2 4 40 R
4 41 IR