Samsung C8249, P8245, P8249, S3C8245 Figure 7-5. Oscillator Control Register (OSCCON), Figure 7-6. STOP Control Register (STPCON)

CLOCK CIRCUIT S3C8245/P8245/C8249/P8249
7-4
Oscillator Control Register (OSCCON)
F3H, Set 1, bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
Not used
System clock selection bit:
0 = Main oscillator select
1 = Subsystem oscillator select
Not used
Subsystem oscillator control bit:
0 = Subsystem oscillator RUN
1 = Subsystem oscillator STOP
Mainsystem oscillator control bit:
0 = Mainsystem oscillator RUN
1 = Mainsystem oscillator STOP
Subsystem oscillator driving
ability control bit:
0 = Strong driving ability
1 = Normal driving ability
NOTE: In strong mode the warm-up time is less than 100 ms.
When the CPU is operated with fxt (sub-oscillation clock), it is possible to use the stop
instruction but in this case before using stop instruction, you must select fxx/128 for basic
timer counter clock input.
Then the oscillation stabilization time is 62.5 ((1/32768) x 128 x 16) ms + 100 ms
Here the warm-up time is from the time that the stop release signal activates to the time
that basic timer starts counting.
Figure 7-5. Oscillator Control Register (OSCCON)
STOP Control Register (STPCON)
F4H, Set 1,bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
STOP Control bits:
Other values = Disable STOP instruction
10100101 = Enable STOP instruction
Figure 7-6. STOP Control Register (STPCON)