Sonic Alert msm85c154hvs, msm83c154s CPU 1 OUT, NPN transistor direct connection circuit

MSM80C154S/83C154S/85C154HVS

5.9Precautions When Driving External Transistors by Ouasi-bidirectional Port Output Signals

The following points must be carefully considered when quasi-bidirectional ports are used to drive a transistor by the circuit shown in Figure 5-12.

Even though the CPU output in this circuit is at “1” level, the port output pin level may be clamped by the base-emitter voltage VBE (0.7V) of an external NPN transistor, resulting in a pin level of “0”.

VCC VCC

10kΩ	100kΩ
	P	OUT
		IB
	CPU "1" OUT	.
		VBE=. 0.7V

Figure 5-12 NPN transistor direct connection circuit

When the pin level is dropped to “0”, the CPU disconnects the 10Wk pull-up resistance from the power supply, leaving only the 100 kW pull-up resistance connected. Since the base current IB of an external NPN transistor is supplied via the 100 kW resistance, the transistor collector current IC may be reduced to a level insufficient for driving purposes.

To resolve this problem, diode can be inserted between the transistor base and CPU pin as indicated in Figure 5-13 to achieve a pin level of “1” by level shift. or by using a PNP transistor as indicated in Figure 5-14 where the external transistor is driven by a “0” level port output, this problem is solved.

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