Sonic Alert msm83c154s, msm80154s MSM80C154S/83C154S/85C154HVS 2.8 I/O control register Iocon

MSM80C154S/83C154S/85C154HVS

4.4.2.8 I/O control register (IOCON)

Name	Address	MSB							LSB
		7	6	5	4	3	2	1	0
IOCON	0F8H	—	T32	SERR	IZC	P3HZ	P2HZ	P1HZ	ALF
Bit location	Flag				Function
IOCON.0	ALF	If CPU power down mode (PD, HPD) is activated with this bit set
		to "1", the outputs from ports 0, 1, 2, and 3 are switched to floating
		status.
		When this bit is "0", ports 0, 1, 2, and 3 are in output mode.
IOCON.1	P1HZ	Port 1 becomes a high impedance input port when this bit is "1".
IOCON.2	P2HZ	Port 2 becomes a high impedance input port when this bit is "1".
IOCON.3	P3HZ	Port 3 becomes a high impedance input port when this bit is "1".
IOCON.4	IZC	The 10 kohm pull-up resistance for ports 1, 2, and 3 is switched off
		when this bit is "1", leaving only the 100 kohm pull-up resistance.
IOCON.5	SERR	Serial port reception error flag.
		This flag is set to "1" if an overrun or framing error is generated
		when data is received at a serial port. The flag is reset by software.
IOCON.6	T32	Timer/counters 0 and 1 are connected serially to form a 32-bit
		timer/counter when this bit is set to "1". TF1 of TCON is set if a
		carry is generated in the 32-bit timer/counter.
IOCON.7	—	The output data is "0" if the bit is read.
		This bit should not be set to "1".

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