Sonic Alert msm83c154s, msm80154s MSM80C154S/83C154S/85C154HVS Power control register Pcon

MSM80C154S/83C154S/85C154HVS

4.4.2.2 Power control register (PCON)

Name	Address	MSB							LSB
		7	6	5	4	3	2	1	0
PCON	87H	SMOD	HPD	RPD	—	GF1	GF0	PD	IDL
Bit location	Flag				Function
PCON.0	IDL	IDLE mode set when this bit is set to "1". CPU operations are
		stopped when IDLE mode is set, but XTAL1·2, timer/counters 0, 1,
		and 2, the interrupt circuits, and serial port remain active. IDLE
		mode is cancelled when the CPU is reset or when an interrupt is
		generated.
PCON.1	PD	PD mode set when this bit is set to "1". CPU operations and
		XTAL1·2 are stopped when PD mode is set. PD mode is cancelled
		when the CPU is reset or when an interrupt is generated.
PCON.2	GF0	User flag. Testing this flag when IDLE mode is cancelled by an
		interrupt shows whether the interrupt is a normal interrupt or an
		IDLE mode release interrupt.
PCON.3	GF1	User flag. Testing this flag when PD mode is cancelled by an
		interrupt shows whether the interrupt is a normal interrupt or a PD
		mode release interrupt.
PCON.4	—	Reserved bit. The output data is "1" if the bit is read.
PCON.5	RPD	Bit used to specify cancellation of CPU power down mode (IDLE
		or PD) by interrupt signal.
		Power down mode cannot be cancelled by interrupt signal if
		interrupt is not enabled by IE (interrupt enable register) when this
		bit is "0".
		If the interrupt flag is set to "1" by an interrupt request signal when
		this bit is "1" (even if interrupt is disabled), the program is executed
		from the next address of the power down mode setting instruction.
		The flag is reset to "0" by software.
PCON.6	HPD	The hard power down setting mode is enabled when this bit is set
		to "1".
		If the level of the power failure detect signal applied to the HPDI
		pin (pin 3.5) is changed from "1" to "0" when this bit is "1",
		XTAL1·2 oscillation is stopped and the system is put into hard
		power down mode.
PCON.7	SMOD	When the serial port is used in mode 1, 2 or 3, this bit has the
		following functions. The serial port operation clock is reduced by
		1/2 when the bit is "0" for delayed processing. And when the bit is
		"1", the serial port operation clock is normal for faster processing.

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