101
STP2002QFP
Fast Ethernet, Parallel Port, SCSI (FEPS) - STP2002QFP
Sun Microsystems,
7.5.13 ETX TxFIFO Write Pointer
This nine-bit loadable counter points to the next location in the FIFO that will
be loaded with SBus data, the checksum, or the frame control word. The
counter increments by 1 or 2 (depending on SBus configuration) after a word
(or double word) was loaded into the FIFO. The counter is loaded with the
contents of shadow write pointer, plus the appropriate offset, when the check-
sum is stuffed into the frame. This counter is used to generate the write ad-
dress for the TxFIFO memory core.
7.5.14 ETX TxFIFO Shadow Write Pointer
This nine-bit register points to the first byte of the packet that is either cur-
rently being loaded or is about to be loaded into the FIFO. The register is
loaded with the contents of the write pointer after the packet transfer from the
SBus to the FIFO has been completed. When the write pointer is used to stuff
the checksum into the frame, this register serves as a temporary hold register
for the write pointer.
Table 111: ETX TxFIFO Packet Counter Register Definition
Field Bits Description Type
TxFIFO packet counter 7:0 Up/down counter to keep track of number
of frames currently in the TxFIFO
R/W
Table 112: ETX TxFIFO Write Pointer Register Address
Register Physical Address Access Size
ETX TxFIFO write pointer register 0x8C0_2014 4 bytes
Table 113: ETX TxFIFO Write Pointer Register Definition
Field Bits Description Type
TxFIFO write pointer 8:0 Counter that points to next location in FIFO
that will be loaded with SBus data, check-
sum or frame control word
R/W