85
STP2002QFP
Fast Ethernet, Parallel Port, SCSI (FEPS) - STP2002QFP
Sun Microsystems,
7.4.4 FAS366 Transfer Count High (Write Only) Register7.4.5 FAS366 FIFO Register
The SCSI data FIFO consists of 16 registers, each two bytes wide. Data can
be read/written from/to FIFO, with a slave or DMA access. The data is loaded
into the FIFO top register and is unloaded from the FIFO bottom register.
7.4.6 FAS366 Command Register
The command register is an eight-bit, read/write register that functions as a
two-byte deep FIFO, enabling the CPU to stack commands to the FAS366.
Each command loaded into the command register is defined by an eight-bit
command code, which consists of the DMA indicator, the command mode,
and the command indicator.
Table 56: FAS366 Transfer Count High Register (Write Only) Address
Register Physical Address Access Size
Transfer count high 0x881_0004 2 bytes
Table 57: FAS366 Transfer Count High Register (Write Only) Definition
Field Bits Description Type
Transfer count high 15:0 Programmed with 16 bits of transfer count W
Table 58: FAS366 FIFO Register Address
Register Physical Address Access Size
FIFO register 0x881_0008 1 byte
Table 59: FAS366 FIFO Register Definition
Field Bits Description Type
FIFO 7:0 Data port for FIFO access R/W
Table 60: FAS366 Command Register Address
Register Physical Address Access Size
Command register 0x881_000C 1 byte