Intel 80C188EA Synchronous Inputs, TEST, NMI, INT30 T10IN, Ardy, SRDY, DRQ10, HOLD, PEREQ, Error

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80C186EA/80C188EA, 80L186EA/80L188EA

AC SPECIFICATIONS (Continued)

AC Characteristics—80C186EA25/80C186EA20/80C186EA13

Symbol

 

 

Parameter

Min

Max

Min

Max

Min

Max

Units

Notes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SYNCHRONOUS INPUTS

25 MHz(12)

20 MHz

13 MHz

 

 

TCHIS

 

TEST, NMI, INT3:0,

8

 

10

 

10

 

ns

1, 9

 

 

T1:0IN, ARDY

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCHIH

 

TEST, NMI, INT3:0,

3

 

3

 

3

 

ns

1, 9

 

 

T1:0IN, ARDY

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCLIS

 

AD15:0 (AD7:0), ARDY,

10

 

10

 

10

 

ns

1, 10

 

 

SRDY, DRQ1:0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCLIH

 

AD15:0 (AD7:0), ARDY,

3

 

3

 

3

 

ns

1, 10

 

 

SRDY, DRQ1:0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCLIS

 

HOLD, PEREQ, ERROR

10

 

10

 

10

 

ns

1, 9

 

 

(80C186EA Only)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCLIH

 

HOLD, PEREQ, ERROR

3

 

3

 

3

 

ns

1, 9

 

 

(80C186EA Only)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCLIS

 

RESIN (to CLKIN)

10

 

10

 

10

 

ns

1, 9

 

 

 

 

 

 

 

 

 

 

 

 

TCLIH

 

RESIN (from CLKIN)

3

 

3

 

3

 

ns

1, 9

NOTES:

1.See AC Timing Waveforms, for waveforms and definition.

2.Measured at VIH for high time, VIL for low time.

3.Only required to guarantee ICC. Maximum limits are bounded by TC, TCH and TCL.

4.Specified for a 50 pF load, see Figure 13 for capacitive derating information.

5.Specified for a 50 pF load, see Figure 14 for rise and fall times outside 50 pF.

6.See Figure 14 for rise and fall times.

7.TCHOV1 applies to BHE (RFSH), LOCK and A19:16 only after a HOLD release.

8.TCHOV2 applies to RD and WR only after a HOLD release.

9.Setup and Hold are required to guarantee recognition.

10.Setup and Hold are required for proper operation.

11.TCHOVS applies to BHE (RFSH) and A19:16 only after a HOLD release.

12.Operating conditions for 25 MHz are 0§C to a70§C, VCC e 5.0V g10%.

Pin names in parentheses apply to the 80C188EA/80L188EA.

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Contents BIT HIGH-INTEGRATION Embedded Processors Contentspage C186EA/80C188EA Block Diagram Bus Interface Unit Introduction80C186EA Core Architecture Clock GeneratorInterrupt Control Unit Timer/Counter Unit80C186EA Peripheral Architecture Crystal Connection Clock ConnectionPeripheral Control Block Registers Chip-Select Unit Power ManagementDMA Control Unit Refresh Control UnitDifferences Between the 80C186XL and the 80C186EA Plcc Package InformationPin Descriptions QFP EiajRWH Resin ClkinOscout ResoutRfsh ALE/QS0BHE RD/QSMDSrdy WR/QS1Ardy DENMCS2 MCS1/ERRORMCS0/PEREQ MCS3/NCS80C186EA Pinout AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7Lead Plcc Pinout Diagram Plcc Package Location with Pin NamesQFP Eiaj Pin Names with Package Location Quad Flat Pack Eiaj Pinout Diagram QFP Eiaj Package Location with Pin NamesHlda Hold Srdy Lock TEST/BUSY NMI INT0 INT1/SELECT Sqfp Pin Functions with Package LocationSqfp Pin Locations with Pin Names UCS LCS PCS6/A2 PCS5/A1 PCS4 PCS3 PCS2 PCS1CA QFP 60.5 CA Sqfp Package Thermal Specifications400 600 800 1000 CA Plcc Absolute Maximum Ratings Electrical SpecificationsVoltage on Other Pins with Respect Recommended ConnectionsDC Specifications 80C186EA/80C188EA RD/QSMD, UCS, LCS, MCS0/PEREQDC Specifications 80L186EA/80L188EA RD/QSMD, UCS, LCS, MCS0And/or higher temperature will increase delay time Power e V c I e V2 c Cdev c f ICC e Iccs e V c Cdev c fPdtmr PIN Delay Calculation ICC Versus Frequency and VoltageAC Specifications AC Characteristics-80C186EA25/80C186EA20/80C186EA13TEST, NMI, INT30 T10IN, Ardy HOLD, PEREQ, ErrorSynchronous Inputs SRDY, DRQ10MCS30, LCS, UCS AC Characteristics-80L186EA13/80L186EA8ALE, Lock LOCK, RESOUT, Hlda T0OUT, T1OUTTEST, NMI, INT30, T10IN, Ardy AD150 AD70, ARDY, SRDY, DRQ10Relative Timings AC Test Conditions AC Timing WaveformsOutput Delay and Float Waveform Relative Signal Waveform Reset Derating CurvesPowerup Reset Waveforms Warm Reset Waveforms BUS Cycle Waveforms Read, Fetch and Refresh Cycle WaveformWrite Cycle Waveform Halt Cycle Waveform Inta Cycle Waveform HOLD/HLDA Waveform Dram Refresh Cycle During Hold Acknowledge Ready Waveform 80C186EA/80C188EA Execution Timings Instruction SET Summary Data TransferInstruction SET Summary ArithmeticLogic String Manipulation Within seg adding immed to SP 101 BP 101 CH 110 SI 110 DH 111 DI 111 BH 010 DX 010 DL100 SP Revision History Errata

80L186EA, 80L188EA, 80C186EA, 80C188EA specifications

The Intel 80C188EA, 80C186EA, 80L188EA, and 80L186EA microprocessors represent significant developments in the realm of embedded computing during the 1980s. These processors are part of Intel's x86 architecture, designed to cater to a variety of industrial applications, including automotive and telecommunications.

The 80C188EA and 80C186EA are CMOS variants that offer enhanced power efficiency and reduced heat generation compared to their NMOS predecessors. Operating at clock speeds of up to 25 MHz, these processors are known for their performance in real-time applications. The 80C188EA features a 16-bit data bus and a 16-bit address bus, which can support up to 1 MB of addressable memory. It also boasts an extended instruction set for greater computing flexibility, making it suitable for intricate tasks in embedded systems.

Similarly, the 80C186EA is characterized by its 16-bit architecture, but it includes additional on-chip memory management capabilities. This processor can handle 256 KB of memory directly and supports paged memory management, facilitating efficient multitasking and resource sharing in complex applications. Its integrated DMA controller and interrupt controller allow for superior handling of peripheral devices, making it ideal for real-time processing requirements.

On the other hand, the 80L188EA and 80L186EA are low-power variants optimized for battery-operated designs. These microprocessors are tailored for applications where power consumption is critical. The 80L188EA retains the essential features of the 80C188EA but operates at lower voltage levels, thus allowing for longer operational life in portable devices. The 80L186EA similarly benefits from reduced power consumption, taking advantage of its energy-efficient design to enhance durability in industrial automation scenarios.

All four processors leverage Intel's established x86 architecture, enabling a wide range of software compatibility. Their built-in support for real-time interrupt handling and I/O operations provides developers with valuable tools for building reliable embedded systems. Additionally, they feature on-chip oscillators and timers, further streamlining design requirements and reducing the need for external components.

Overall, the Intel 80C188EA, 80C186EA, 80L188EA, and 80L186EA processors are ideal for diverse applications in embedded systems. Their blend of processing power, energy efficiency, and versatility continues to influence the design of modern electronic devices, underscoring Intel's pivotal role in advancing microprocessor technology.