Intel 80L186EA, 80L188EA, 80C188EA specifications Differences Between the 80C186XL and the 80C186EA

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80C186EA/80C188EA, 80L186EA/80L188EA

80C187 Interface (80C186EA Only)

The 80C187 Numerics Coprocessor may be used to extend the 80C186EA instruction set to include floating point and advanced integer instructions. Connecting the 80C186EA RESOUT and TEST/ BUSY pins to the 80C187 enables Numerics Mode operation. In Numerics Mode, three of the four Mid- Range Chip Select (MCS) pins become handshaking pins for the interface. The exchange of data and control information proceeds through four dedicated I/O ports.

If an 80C187 is not present, the 80C186EA config- ures itself for regular operation at reset.

NOTE:

The 80C187 is not specified for 3V operation and therefore does not interface directly to the 80L186EA.

ONCE Test Mode

To facilitate testing and inspection of devices when fixed into a target system, the 80C186EA has a test mode available which forces all output and input/ output pins to be placed in the high-impedance state. ONCE stands for ‘‘ON Circuit Emulation’’. The ONCE mode is selected by forcing the UCS and LCS pins LOW (0) during a processor reset (these pins are weakly held to a HIGH (1) level) while RESIN is active.

DIFFERENCES BETWEEN THE 80C186XL AND THE 80C186EA

The 80C186EA is intended as a direct functional up- grade for 80C186XL designs. In many cases, it will be possible to replace an existing 80C186XL with little or no hardware redesign. The following sections describe differences in pinout, operating modes, and AC and DC specifications to keep in mind.

Pinout Compatibility

The 80C186EA requires a PDTMR pin to time the processor’s exit from Powerdown Mode. The original pin arrangement for the 80C186XL in the PLCC package did not have any spare leads to use for PDTMR, so the DT/R pin was sacrificed. The ar- rangement of all the other leads in the 68-lead PLCC is identical between the 80C186XL and the 80C186EA. DT/R may be synthesized by latching the S1 status output. Therefore, upgrading a PLCC 80C186XL to PLCC 80C186EA is straightforward.

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The 80-lead QFP (EIAJ) pinouts are different be- tween the 80C186XL and the 80C186EA. In addition to the PDTMR pin, the 80C186EA has more power and ground pins and the overall arrangement of pins was shifted. A new circuit board layout for the 80C186EA is required.

Operating Modes

The 80C186XL has two operating modes, Compati- ble and Enhanced. Compatible Mode is a pin-to-pin replacement for the NMOS 80186, except for nu- merics coprocessing. In Enhanced Mode, the proc- essor has a Refresh Control Unit, the Power-Save feature and an interface to the 80C187 Numerics Coprocessor. The MCS0, MCS1, and MCS3 pins change their functions to constitute handshaking pins for the 80C187.

The 80C186EA allows all non-80C187 users to use all the MCS pins for chip-selects. In regular opera- tion, all 80C186EA features (including those of the Enhanced Mode 80C186) are present except for the interface to the 80C187. Numerics Mode disables the three chip-select pins and reconfigures them for connection to the 80C187.

TTL vs CMOS Inputs

The inputs of the 80C186EA are rated for CMOS switching levels for improved noise immunity, but the 80C186XL inputs are rated for TTL switching levels. In particular, the 80C186EA requires a minimum VIH of 3.5V to recognize a logic one while the 80C186XL requires a minimum VIH of only 1.9V (assuming 5.0V operation). The solution is to drive the 80C186EA with true CMOS devices, such as those from the HC and AC logic families, or to use pullup resistors where the added current draw is not a problem.

Timing Specifications

80C186EA timing relationships are expressed in a simplified format over the 80C186XL. The AC per- formance of an 80C186EA at a specified frequency will be very close to that of an 80C186XL at the same frequency. Check the timings applicable to your design prior to replacing the 80C186XL.

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Contents BIT HIGH-INTEGRATION Embedded Processors Contentspage C186EA/80C188EA Block Diagram Introduction 80C186EA Core ArchitectureBus Interface Unit Clock GeneratorTimer/Counter Unit 80C186EA Peripheral ArchitectureInterrupt Control Unit Crystal Connection Clock ConnectionPeripheral Control Block Registers Power Management DMA Control UnitChip-Select Unit Refresh Control UnitDifferences Between the 80C186XL and the 80C186EA Package Information Pin DescriptionsPlcc QFP EiajRWH Clkin OscoutResin ResoutALE/QS0 BHERfsh RD/QSMDWR/QS1 ArdySrdy DENMCS1/ERROR MCS0/PEREQMCS2 MCS3/NCS80C186EA Pinout AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7Lead Plcc Pinout Diagram Plcc Package Location with Pin NamesQFP Eiaj Pin Names with Package Location Quad Flat Pack Eiaj Pinout Diagram QFP Eiaj Package Location with Pin NamesSqfp Pin Functions with Package Location Sqfp Pin Locations with Pin NamesHlda Hold Srdy Lock TEST/BUSY NMI INT0 INT1/SELECT UCS LCS PCS6/A2 PCS5/A1 PCS4 PCS3 PCS2 PCS1CA QFP 60.5 CA Sqfp Package Thermal Specifications400 600 800 1000 CA Plcc Electrical Specifications Voltage on Other Pins with RespectAbsolute Maximum Ratings Recommended ConnectionsDC Specifications 80C186EA/80C188EA RD/QSMD, UCS, LCS, MCS0/PEREQDC Specifications 80L186EA/80L188EA RD/QSMD, UCS, LCS, MCS0Power e V c I e V2 c Cdev c f ICC e Iccs e V c Cdev c f Pdtmr PIN Delay CalculationAnd/or higher temperature will increase delay time ICC Versus Frequency and VoltageAC Specifications AC Characteristics-80C186EA25/80C186EA20/80C186EA13HOLD, PEREQ, Error Synchronous InputsTEST, NMI, INT30 T10IN, Ardy SRDY, DRQ10AC Characteristics-80L186EA13/80L186EA8 ALE, LockMCS30, LCS, UCS LOCK, RESOUT, Hlda T0OUT, T1OUTTEST, NMI, INT30, T10IN, Ardy AD150 AD70, ARDY, SRDY, DRQ10Relative Timings AC Test Conditions AC Timing WaveformsOutput Delay and Float Waveform Relative Signal Waveform Reset Derating CurvesPowerup Reset Waveforms Warm Reset Waveforms BUS Cycle Waveforms Read, Fetch and Refresh Cycle WaveformWrite Cycle Waveform Halt Cycle Waveform Inta Cycle Waveform HOLD/HLDA Waveform Dram Refresh Cycle During Hold Acknowledge Ready Waveform 80C186EA/80C188EA Execution Timings Instruction SET Summary Data TransferInstruction SET Summary ArithmeticLogic String Manipulation Within seg adding immed to SP 101 BP 101 CH 110 SI 110 DH 111 DI 111 BH 010 DX 010 DL100 SP Revision History Errata

80L186EA, 80L188EA, 80C186EA, 80C188EA specifications

The Intel 80C188EA, 80C186EA, 80L188EA, and 80L186EA microprocessors represent significant developments in the realm of embedded computing during the 1980s. These processors are part of Intel's x86 architecture, designed to cater to a variety of industrial applications, including automotive and telecommunications.

The 80C188EA and 80C186EA are CMOS variants that offer enhanced power efficiency and reduced heat generation compared to their NMOS predecessors. Operating at clock speeds of up to 25 MHz, these processors are known for their performance in real-time applications. The 80C188EA features a 16-bit data bus and a 16-bit address bus, which can support up to 1 MB of addressable memory. It also boasts an extended instruction set for greater computing flexibility, making it suitable for intricate tasks in embedded systems.

Similarly, the 80C186EA is characterized by its 16-bit architecture, but it includes additional on-chip memory management capabilities. This processor can handle 256 KB of memory directly and supports paged memory management, facilitating efficient multitasking and resource sharing in complex applications. Its integrated DMA controller and interrupt controller allow for superior handling of peripheral devices, making it ideal for real-time processing requirements.

On the other hand, the 80L188EA and 80L186EA are low-power variants optimized for battery-operated designs. These microprocessors are tailored for applications where power consumption is critical. The 80L188EA retains the essential features of the 80C188EA but operates at lower voltage levels, thus allowing for longer operational life in portable devices. The 80L186EA similarly benefits from reduced power consumption, taking advantage of its energy-efficient design to enhance durability in industrial automation scenarios.

All four processors leverage Intel's established x86 architecture, enabling a wide range of software compatibility. Their built-in support for real-time interrupt handling and I/O operations provides developers with valuable tools for building reliable embedded systems. Additionally, they feature on-chip oscillators and timers, further streamlining design requirements and reducing the need for external components.

Overall, the Intel 80C188EA, 80C186EA, 80L188EA, and 80L186EA processors are ideal for diverse applications in embedded systems. Their blend of processing power, energy efficiency, and versatility continues to influence the design of modern electronic devices, underscoring Intel's pivotal role in advancing microprocessor technology.
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