Intel 80L188EA 80C186EA Peripheral Architecture, Interrupt Control Unit, Timer/Counter Unit

Page 5

80C186EA/80C188EA, 80L186EA/80L188EA

272432 – 4

 

272432 – 3

(A) Crystal Connection

(B) Clock Connection

NOTE:

The L1C1 network is only required when using a third-overtone crystal.

Figure 2. Clock Configurations

80C186EA PERIPHERAL ARCHITECTURE

The 80C186EA has integrated several common sys- tem peripherals with a CPU core to create a com- pact, yet powerful system. The integrated peripher- als are designed to be flexible and provide logical interconnections between supporting units (e.g., the interrupt control unit supports interrupt requests from the timer/counters or DMA channels).

The list of integrated peripherals include:

#4-Input Interrupt Control Unit

#3-Channel Timer/Counter Unit

#2-Channel DMA Unit

#13-Output Chip-Select Unit

#Refresh Control Unit

#Power Management logic

The registers associated with each integrated peri- heral are contained within a 128 x 16 register file called the Peripheral Control Block (PCB). The PCB can be located in either memory or I/O space on any 256 byte address boundary.

Figure 3 provides a list of the registers associated with the PCB when the processor’s Interrupt Control Unit is in Master Mode. In Slave Mode, the defini- tions of some registers change. Figure 4 provides register definitions specific to Slave Mode.

Interrupt Control Unit

The 80C186EA can receive interrupts from a num- ber of sources, both internal and external. The Inter- rupt Control Unit (ICU) serves to merge these re- quests on a priority basis, for individual service by the CPU. Each interrupt source can be independent- ly masked by the Interrupt Control Unit or all inter- rupts can be globally masked by the CPU.

Internal interrupt sources include the Timers and DMA channels. External interrupt sources come from the four input pins INT3:0. The NMI interrupt pin is not controlled by the ICU and is passed direct- ly to the CPU. Although the timers only have one request input to the ICU, separate vector types are generated to service individual interrupts within the Timer Unit.

Timer/Counter Unit

The 80C186EA Timer/Counter Unit (TCU) provides three 16-bit programmable timers. Two of these are highly flexible and are connected to external pins for control or clocking. A third timer is not connected to any external pins and can only be clocked internally. However, it can be used to clock the other two timer channels. The TCU can be used to count external events, time external events, generate non-repeti- tive waveforms, generate timed interrupts, etc.

5

5

Page 4 Page 6
Image 5
Page 4 Page 6
Contents BIT HIGH-INTEGRATION Embedded Processors Contentspage C186EA/80C188EA Block Diagram 80C186EA Core Architecture IntroductionBus Interface Unit Clock Generator80C186EA Peripheral Architecture Timer/Counter UnitInterrupt Control Unit Crystal Connection Clock ConnectionPeripheral Control Block Registers DMA Control Unit Power ManagementChip-Select Unit Refresh Control UnitDifferences Between the 80C186XL and the 80C186EA Pin Descriptions Package InformationPlcc QFP EiajRWH Oscout ClkinResin ResoutBHE ALE/QS0Rfsh RD/QSMDArdy WR/QS1Srdy DENMCS0/PEREQ MCS1/ERRORMCS2 MCS3/NCSAD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 80C186EA PinoutPlcc Package Location with Pin Names Lead Plcc Pinout DiagramQFP Eiaj Pin Names with Package Location QFP Eiaj Package Location with Pin Names Quad Flat Pack Eiaj Pinout DiagramSqfp Pin Locations with Pin Names Sqfp Pin Functions with Package LocationHlda Hold Srdy Lock TEST/BUSY NMI INT0 INT1/SELECT UCS LCS PCS6/A2 PCS5/A1 PCS4 PCS3 PCS2 PCS1CA QFP 60.5 CA Sqfp Package Thermal Specifications400 600 800 1000 CA Plcc Voltage on Other Pins with Respect Electrical SpecificationsAbsolute Maximum Ratings Recommended ConnectionsRD/QSMD, UCS, LCS, MCS0/PEREQ DC Specifications 80C186EA/80C188EARD/QSMD, UCS, LCS, MCS0 DC Specifications 80L186EA/80L188EAPdtmr PIN Delay Calculation Power e V c I e V2 c Cdev c f ICC e Iccs e V c Cdev c fAnd/or higher temperature will increase delay time ICC Versus Frequency and VoltageAC Characteristics-80C186EA25/80C186EA20/80C186EA13 AC SpecificationsSynchronous Inputs HOLD, PEREQ, ErrorTEST, NMI, INT30 T10IN, Ardy SRDY, DRQ10ALE, Lock AC Characteristics-80L186EA13/80L186EA8MCS30, LCS, UCS LOCK, RESOUT, Hlda T0OUT, T1OUTAD150 AD70, ARDY, SRDY, DRQ10 TEST, NMI, INT30, T10IN, ArdyRelative Timings AC Timing Waveforms AC Test ConditionsOutput Delay and Float Waveform Relative Signal Waveform Derating Curves ResetPowerup Reset Waveforms Warm Reset Waveforms Read, Fetch and Refresh Cycle Waveform BUS Cycle WaveformsWrite Cycle Waveform Halt Cycle Waveform Inta Cycle Waveform HOLD/HLDA Waveform Dram Refresh Cycle During Hold Acknowledge Ready Waveform 80C186EA/80C188EA Execution Timings Data Transfer Instruction SET SummaryArithmetic Instruction SET SummaryLogic String Manipulation Within seg adding immed to SP 101 BP 101 CH 110 SI 110 DH 111 DI 111 BH 010 DX 010 DL100 SP Errata Revision History

80L186EA, 80L188EA, 80C186EA, 80C188EA specifications

The Intel 80C188EA, 80C186EA, 80L188EA, and 80L186EA microprocessors represent significant developments in the realm of embedded computing during the 1980s. These processors are part of Intel's x86 architecture, designed to cater to a variety of industrial applications, including automotive and telecommunications.

The 80C188EA and 80C186EA are CMOS variants that offer enhanced power efficiency and reduced heat generation compared to their NMOS predecessors. Operating at clock speeds of up to 25 MHz, these processors are known for their performance in real-time applications. The 80C188EA features a 16-bit data bus and a 16-bit address bus, which can support up to 1 MB of addressable memory. It also boasts an extended instruction set for greater computing flexibility, making it suitable for intricate tasks in embedded systems.

Similarly, the 80C186EA is characterized by its 16-bit architecture, but it includes additional on-chip memory management capabilities. This processor can handle 256 KB of memory directly and supports paged memory management, facilitating efficient multitasking and resource sharing in complex applications. Its integrated DMA controller and interrupt controller allow for superior handling of peripheral devices, making it ideal for real-time processing requirements.

On the other hand, the 80L188EA and 80L186EA are low-power variants optimized for battery-operated designs. These microprocessors are tailored for applications where power consumption is critical. The 80L188EA retains the essential features of the 80C188EA but operates at lower voltage levels, thus allowing for longer operational life in portable devices. The 80L186EA similarly benefits from reduced power consumption, taking advantage of its energy-efficient design to enhance durability in industrial automation scenarios.

All four processors leverage Intel's established x86 architecture, enabling a wide range of software compatibility. Their built-in support for real-time interrupt handling and I/O operations provides developers with valuable tools for building reliable embedded systems. Additionally, they feature on-chip oscillators and timers, further streamlining design requirements and reducing the need for external components.

Overall, the Intel 80C188EA, 80C186EA, 80L188EA, and 80L186EA processors are ideal for diverse applications in embedded systems. Their blend of processing power, energy efficiency, and versatility continues to influence the design of modern electronic devices, underscoring Intel's pivotal role in advancing microprocessor technology.
Top Page Image Contents