Intel 80C186EA, 80L188EA AC Characteristics-80L186EA13/80L186EA8, ALE, Lock, MCS30, LCS, UCS

Page 27

80C186EA/80C188EA, 80L186EA/80L188EA

AC SPECIFICATIONS

AC Characteristics—80L186EA13/80L186EA8

Symbol

 

 

 

 

 

 

Parameter

Min

 

Max

Min

 

Max

Units

Notes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

INPUT CLOCK

13 MHz

 

8 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TF

 

CLKIN Frequency

0

 

26

0

 

16

MHz

1

TC

 

CLKIN Period

38.5

 

%

62.5

 

%

ns

1

TCH

 

CLKIN High Time

12

 

%

12

 

%

ns

1, 2

TCL

 

CLKIN Low Time

12

 

%

12

 

%

ns

1, 2

TCR

 

CLKIN Rise Time

1

 

8

1

 

8

ns

1, 3

TCF

 

CLKIN Fall Time

1

 

8

1

 

8

ns

1, 3

OUTPUT CLOCK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCD

 

CLKIN to CLKOUT Delay

0

 

45

0

 

95

ns

1, 4

T

 

CLKOUT Period

(T/2) b 5

 

2*TC

(T/2) b 5

 

2*TC

ns

1

TPH

 

CLKOUT High Time

 

 

 

 

ns

1

TPL

 

CLKOUT Low Time

(T/2) b 5

 

 

(T/2) b 5

 

 

ns

1

TPR

 

CLKOUT Rise Time

1

 

12

1

 

12

ns

1, 5

TPF

 

CLKOUT Fall Time

1

 

12

1

 

12

ns

1, 5

OUTPUT DELAYS

 

 

 

 

 

 

 

 

TCHOV1

 

ALE, LOCK

3

 

27

3

 

27

ns

1, 4, 6, 7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCHOV2

 

MCS3:0, LCS, UCS,

3

 

32

3

 

32

ns

1, 4,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCS6:0, RD, WR

 

 

 

 

 

 

 

6, 8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCHOV3

 

S2:0 (DEN), DT/R,

3

 

30

3

 

30

ns

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BHE (RFSH), A19:16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCLOV1

 

LOCK, RESOUT, HLDA,

3

 

27

3

 

27

ns

1, 4, 6

 

 

T0OUT, T1OUT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCLOV2

 

RD, WR, MCS3:0, LCS,

3

 

32

3

 

35

ns

1, 4, 6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

UCS, PCS6:0, INTA1:0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCLOV3

 

BHE (RFSH), DEN, A19:16

3

 

30

3

 

30

ns

1, 4, 6

TCLOV4

 

AD15:0 (A15:8, AD7:0)

3

 

34

3

 

35

ns

1, 4, 6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCLOV5

 

S2:0

3

 

38

3

 

40

ns

1, 4, 6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCHOF

 

RD, WR, BHE (RFSH),

0

 

27

0

 

27

ns

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DT/R, LOCK,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

S2:0, A19:16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCLOF

 

DEN, AD15:0

 

 

 

 

 

 

 

 

 

 

(A15:8, AD7:0)

0

 

27

0

 

27

ns

1

NOTES:

1.See AC Timing Waveforms, for waveforms and definition.

2.Measured at VIH for high time, VIL for low time.

3.Only required to guarantee ICC. Maximum limits are bounded by TC, TCH and TCL.

4.Specified for a 50 pF load, see Figure 13 for capacitive derating information.

5.Specified for a 50 pF load, see Figure 14 for rise and fall times outside 50 pF.

6.See Figure 14 for rise and fall times.

7.TCHOV1 applies to BHE (RFSH), LOCK and A19:16 only after a HOLD release.

8.TCHOV2 applies to RD and WR only after a HOLD release.

9.Setup and Hold are required to guarantee recognition.

10.Setup and Hold are required for proper operation.

11.TCHOVS applies to BHE (RFSH) and A19:16 only after a HOLD release.

12.Pin names in parentheses apply to the 80C188EA/80L188EA.

27

27

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Contents BIT HIGH-INTEGRATION Embedded Processors Contentspage C186EA/80C188EA Block Diagram Clock Generator Introduction80C186EA Core Architecture Bus Interface UnitCrystal Connection Clock Connection Timer/Counter Unit80C186EA Peripheral Architecture Interrupt Control UnitPeripheral Control Block Registers Refresh Control Unit Power ManagementDMA Control Unit Chip-Select UnitDifferences Between the 80C186XL and the 80C186EA QFP Eiaj Package InformationPin Descriptions PlccRWH Resout ClkinOscout ResinRD/QSMD ALE/QS0BHE RfshDEN WR/QS1Ardy SrdyMCS3/NCS MCS1/ERRORMCS0/PEREQ MCS2AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 80C186EA PinoutPlcc Package Location with Pin Names Lead Plcc Pinout DiagramQFP Eiaj Pin Names with Package Location QFP Eiaj Package Location with Pin Names Quad Flat Pack Eiaj Pinout DiagramUCS LCS PCS6/A2 PCS5/A1 PCS4 PCS3 PCS2 PCS1 Sqfp Pin Functions with Package LocationSqfp Pin Locations with Pin Names Hlda Hold Srdy Lock TEST/BUSY NMI INT0 INT1/SELECTPackage Thermal Specifications 400 600 800 1000 CA PlccCA QFP 60.5 CA Sqfp Recommended Connections Electrical SpecificationsVoltage on Other Pins with Respect Absolute Maximum RatingsRD/QSMD, UCS, LCS, MCS0/PEREQ DC Specifications 80C186EA/80C188EARD/QSMD, UCS, LCS, MCS0 DC Specifications 80L186EA/80L188EAICC Versus Frequency and Voltage Power e V c I e V2 c Cdev c f ICC e Iccs e V c Cdev c fPdtmr PIN Delay Calculation And/or higher temperature will increase delay timeAC Characteristics-80C186EA25/80C186EA20/80C186EA13 AC SpecificationsSRDY, DRQ10 HOLD, PEREQ, ErrorSynchronous Inputs TEST, NMI, INT30 T10IN, ArdyLOCK, RESOUT, Hlda T0OUT, T1OUT AC Characteristics-80L186EA13/80L186EA8ALE, Lock MCS30, LCS, UCSAD150 AD70, ARDY, SRDY, DRQ10 TEST, NMI, INT30, T10IN, ArdyRelative Timings AC Timing Waveforms AC Test ConditionsOutput Delay and Float Waveform Relative Signal Waveform Derating Curves ResetPowerup Reset Waveforms Warm Reset Waveforms Read, Fetch and Refresh Cycle Waveform BUS Cycle WaveformsWrite Cycle Waveform Halt Cycle Waveform Inta Cycle Waveform HOLD/HLDA Waveform Dram Refresh Cycle During Hold Acknowledge Ready Waveform 80C186EA/80C188EA Execution Timings Data Transfer Instruction SET SummaryArithmetic Instruction SET SummaryLogic String Manipulation Within seg adding immed to SP 010 DX 010 DL 100 SP101 BP 101 CH 110 SI 110 DH 111 DI 111 BH Errata Revision History

80L186EA, 80L188EA, 80C186EA, 80C188EA specifications

The Intel 80C188EA, 80C186EA, 80L188EA, and 80L186EA microprocessors represent significant developments in the realm of embedded computing during the 1980s. These processors are part of Intel's x86 architecture, designed to cater to a variety of industrial applications, including automotive and telecommunications.

The 80C188EA and 80C186EA are CMOS variants that offer enhanced power efficiency and reduced heat generation compared to their NMOS predecessors. Operating at clock speeds of up to 25 MHz, these processors are known for their performance in real-time applications. The 80C188EA features a 16-bit data bus and a 16-bit address bus, which can support up to 1 MB of addressable memory. It also boasts an extended instruction set for greater computing flexibility, making it suitable for intricate tasks in embedded systems.

Similarly, the 80C186EA is characterized by its 16-bit architecture, but it includes additional on-chip memory management capabilities. This processor can handle 256 KB of memory directly and supports paged memory management, facilitating efficient multitasking and resource sharing in complex applications. Its integrated DMA controller and interrupt controller allow for superior handling of peripheral devices, making it ideal for real-time processing requirements.

On the other hand, the 80L188EA and 80L186EA are low-power variants optimized for battery-operated designs. These microprocessors are tailored for applications where power consumption is critical. The 80L188EA retains the essential features of the 80C188EA but operates at lower voltage levels, thus allowing for longer operational life in portable devices. The 80L186EA similarly benefits from reduced power consumption, taking advantage of its energy-efficient design to enhance durability in industrial automation scenarios.

All four processors leverage Intel's established x86 architecture, enabling a wide range of software compatibility. Their built-in support for real-time interrupt handling and I/O operations provides developers with valuable tools for building reliable embedded systems. Additionally, they feature on-chip oscillators and timers, further streamlining design requirements and reducing the need for external components.

Overall, the Intel 80C188EA, 80C186EA, 80L188EA, and 80L186EA processors are ideal for diverse applications in embedded systems. Their blend of processing power, energy efficiency, and versatility continues to influence the design of modern electronic devices, underscoring Intel's pivotal role in advancing microprocessor technology.
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