Ampro Corporation 700 CFD2, CFD1, SDD11, SDD12, SDD13, SDD14, SDD15, SDCS3, Sdior, Sdiow, Rstide

Page 42

Chapter 3

Hardware

Pin #

Signal

Description

 

 

 

25

CFD2

Connected through 4.7k ohm resister to ground

 

 

 

26

CFD1

Connected through 4.7k ohm resister to ground

 

 

 

27

SDD11

Secondary Disk Data 11 – Refer to SDD3 on pin-2 for more information.

 

 

 

28

SDD12

Secondary Disk Data 12 – Refer to SDD3 on pin-2 for more information.

 

 

 

29

SDD13

Secondary Disk Data 13 – Refer to SDD3 on pin-2 for more information.

 

 

 

30

SDD14

Secondary Disk Data 14 – Refer to SDD3 on pin-2 for more information.

 

 

 

31

SDD15

Secondary Disk Data 15 – Refer to SDD3 on pin-2 for more information.

 

 

 

32

SDCS3*

Secondary Slave/Master Chip Select – This signal, along with CE1*, is used to

 

 

select the CompactFlash card and indicate to the card when a byte or word

 

 

operation is being performed. This signal always accesses the odd byte of word.

33

NC

Not Connected (VS1*)

 

 

 

34

SDIOR*

Secondary Device I/O Read/Write Strobe – This signal is generated by the host

 

 

and gates the I/O data onto the bus from the CompactFlash card when the card is

 

 

configured to use the I/O interface.

35

SDIOW*

Secondary Device I/O Read/Write Strobe – This signal is generated by the host

 

 

and clocks the I/O data on the Card Data bus into the CompactFlash card

 

 

controller registers when the card is configured to use the I/O interface. The clock

 

 

occurs on the negative to positive edge of the signal (trailing edge).

36

VCC

+5 volts +/-5%

 

 

 

37

IRQ15

Interrupt Request 15 – IRQ 15 is asserted by drive (CF) when it has a pending

 

 

interrupt (PIO transfer of data to or from the drive to the host).

38

VCC

+5 volts +/-5%

 

 

 

39

MASTER*

Master/Slave – This signal is determined by jumper JP4 and is used to configure

 

 

this device as a Master or a Slave. When this pin is grounded (jumper inserted),

 

 

this device is configured as Master. When this pin is open (jumper removed), this

 

 

device is configured as Slave (Default).

40

NC

Not Connected (VS2*)

 

 

 

41

RSTIDE*

Secondary IDE Reset – This input signal is the active low hardware reset from the

 

 

host. If this pin goes high, it is used as the reset signal. This pin is driven high at

 

 

power-up, causing a reset, and if left high will cause another reset.

42

SDIORDY

Secondary Device I/O-DMA Channel Ready – When negated, extends the host

 

 

transfer cycle of any host register access when the drive is not ready to respond to

 

 

a data transfer request. High impedance if asserted.

43

NC

Not Connected (InpAck)

 

 

 

44

VCC

+5 volts +/-5%

 

 

 

45

IDE LED2

IDE Activity – Indicates CF activity to yellow IDE LED (D4) oncard edge.

 

 

 

46

SD33-66

SD33/66 Sense –Senses which DMA mode to use for the CompactFlash card.

 

 

 

47

SDD8

Secondary Disk Data 8 – Refer to SDD3 on pin-2 for more information.

 

 

 

48

SDD9

Secondary Disk Data 9 – Refer to SDD3 on pin-2 for more information.

 

 

 

49

SDD10

Secondary Disk Data 10 – Refer to SDD3 on pin-2 for more information.

 

 

 

50

GND

Digital Ground

 

 

 

Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.

36

Reference Manual

ReadyBoard 700

Image 42
Contents ReadyBoard Single Board Computer Reference Manual Audience Assumptions Revision HistoryContents Appendix a List of Tables Reference Manual ReadyBoard Specifications Purpose of this ManualReference Material Other ReadyBoard Products Related Ampro ProductsReadyBoard 700 Support Products Other Ampro ProductsChapter Reference Manual ReadyBoard Product Overview Epic ArchitectureBoard Features Product DescriptionChapter Chapter Block Diagram ATACPU Major Integrated Circuits ICsChip Type Mfg Model Description Function VIAJack # Signal/Device Description Connector DefinitionsSwitch Definition Component DescriptionAll illustrations Lvds J7Additional Components IllustrationsIndicator Definition Power/IDE LED DefinitionsJumper # Installed Removed Jumper DefinitionsJumper, Switch, and LED Locations Top view Power Specifications SpecificationsPhysical Specifications Environmental SpecificationsMechanical Specifications Thermal/Cooling RequirementsReadyBoard 700 Side view Chapter Hardware OverviewSdram Memory DIMM1 CPU U4Memory Flash MemoryInterrupt Channel Assignments Memory MapAddress hex Subsystem Address MapBase Address Function CF8-CFFPin # Signal Input Description Output PC/104-Plus Interface J12CLK2 REQ0GNT1 PerrIntd REQ2CLK0 IntaGNT2 IDSEL1REQ1 CLK3GNT0 IDSEL2IDSEL3 CLK1Pin # Signal Description J13 Row a PC/104 Interface J13 A/B, J14 C/DPin # Signal Descriptions J13 Row B Pin # Signal Descriptions J14 Row C Pin # Signal Descriptions J14 Row D DRQ5 DRQ0DACK5 DACK6 Pin # Signal Description IDE Interface J22Pdiordy PdiowPdior PdcselCompactFlash Adapter J23 SDD11 CFD2CFD1 SDD12Floppy/Parallel Interface J20 Autofdx SlctinStep DrvenoSerial Interfaces J5A/B, J3A/B RS485 Serial Port ImplementationSerial a Interface J5A/B Serial B Interface J3A/B CTS4 DTR4USB Interfaces J15A/B, J21A/B Primary USB0 and USB1 J15A/BSecondary USB2 and USB3 J21A/B Ethernet Interfaces J10, J11 Pin #Digital Ground Audio Interface J19 Video Interfaces J8, J9, J7 CRT Interface J8LCD Interface J9 Pin # Signal Description Line Channel Lvds Interface J7Utility Interface J18 Reset Switch SW1Miscellaneous Keyboard/Mouse Interface J16Real Time Clock RTC Oops! Jumper Bios RecoveryInfrared IrDA Port J17 IrtxUser Gpio Signals J2 Temperature MonitoringSerial Console Watchdog Timer Serial Console SetupPower-On Interface J6 Power Interfaces J4, J6Power In Interface J4 VccsbReference Manual ReadyBoard Accessing Bios Setup VGA Display IntroductionAccessing Bios Setup Serial Console Bios Setup Menu Item/TopicBios Menus Bios Setup Opening ScreenBios Configuration Screen Date & TimeDrive Assignments # of Floppy Drives Bios Settings Boot OrderDrive and Boot Options Keyboard and Mouse Configuration User InterfaceMemory Power Management Advanced featuresChapter Bios Setup On-Board Serial Ports On-Board LPT PortOn-Board Controllers On-Board VideoType LCD ResolutionPanel Type 640 x 480 x 18 TFT 640 x 480 x 18 bitChapter Bios Setup Chapter Bios Setup Chapter Bios Setup Splash Screen Customization Splash Screen Image RequirementsConverting the Splash Screen File \splashconvert convert.idf Reference Manual ReadyBoard Appendix a Technical Support Method Contact InformationAppendix a Appendix B LAN Boot Option PXE Boot Agent Bios Setup Accessing PXE Boot Agent Bios SetupPXE Boot Agent Setup Screen PXE ConfigurationTCP/IP Configuration NetWare Configuration RPL ConfigurationCD-ROM LEDRTC PostWatchdog timer WDT Table notes Reference Manual ReadyBoard