Ampro Corporation 700 manual IDSEL1, REQ1, GNT2, CLK3, Intb, Pme, Par, Sdone, Devsel

Page 32

Chapter 3

Hardware

Pin #

Signal

Input/

Description

 

 

 

Output

 

76

(C16)

GND

 

Digital Ground

77

(C17)

AD22

T/S

PCI Address and Data Bus Line 22 – Refer to Pin-3 for more

 

 

 

 

information.

78

(C18)

IDSEL1

 

Initialization Device Select 1 – Refer to Pin-18 for more

 

 

 

 

information

79

(C19)

VI/O

NC

(+5V) Not connected

 

 

 

 

 

80

(C20)

AD25

T/S

PCI Address and Data Bus Line 25 – Refer to Pin-3 for more

 

 

 

 

information.

81

(C21)

AD28

T/S

PCI Address and Data Bus Line 28 – Refer to Pin-3 for more

 

 

 

 

information.

82

(C22)

GND

 

Digital Ground

83

(C23)

REQ1*

T/S

Bus Request 1 – Refer to Pin-23 for more information.

 

 

 

 

 

84

(C24)

+5V

 

+5 volt power supply ±5%

85

(C25)

GNT2*

T/S

Grant 2 – Refer to Pin-25 for more information

 

 

 

 

 

86

(C26)

GND

 

Digital Ground

87

(C27)

CLK3

In

PCI clock 3 – Refer to Pin-27 for more information

 

 

 

 

 

88

(C28)

+5V

 

+5 volt power supply ±5%

89

(C29)

INTB*

O/D

Interrupt B – This signal is used to request interrupts only for

 

 

 

 

multi-function devices.

90

(C30)

PME*

 

Power Management Event – This signal is used for power

 

 

 

 

management events

91

(D1)

AD00

T/S

PCI Address and Data Bus Line 0 – Refer to Pin-3 for more

 

 

 

 

information.

92

(D2)

+5V

 

+5 volt power supply ±5%

93

(D3)

AD03

T/S

PCI Address and Data Bus Lines 3 – Refer to Pin-3 for more

 

 

 

 

information.

94

(D4)

AD06

T/S

PCI Address and Data Bus Lines 6 – Refer to Pin-3 for more

 

 

 

 

information.

95

(D5)

GND

 

Digital Ground

96

(D6)

GND

 

Digital Ground

97

(D7)

AD12

T/S

PCI Address and Data Bus Line 12 – Refer to Pin-3 for more

 

 

 

 

information.

98

(D8)

+3.3V

 

+3.3 volt power supply ±5%

99

(D9)

PAR

T/S

PCI bus Parity bit – This signal is the even parity bit on AD[31:0]

 

 

 

 

and C/BE[3:0]*

100 (D10)

SDONE

NC

Snoop Done – Not connected

 

 

 

 

101 (D11)

GND

 

Digital Ground

102 (D12)

DEVSEL*

S/T/S

Device Select – This signal is driven by the target device when its

 

 

 

 

address is decoded.

103 (D13)

+3.3V

 

+3.3 volt power supply ±5%

104 (D14)

C/BE2*

 

PCI Bus Command/Byte Enable 2 – Refer to Pin-4 for more

 

 

 

 

information.

105 (D15)

GND

 

Digital Ground

26

Reference Manual

ReadyBoard 700

Image 32
Contents ReadyBoard Single Board Computer Reference Manual Audience Assumptions Revision HistoryContents Appendix a List of Tables Reference Manual ReadyBoard Reference Material SpecificationsPurpose of this Manual Related Ampro Products ReadyBoard 700 Support ProductsOther ReadyBoard Products Other Ampro ProductsChapter Reference Manual ReadyBoard Product Overview Epic ArchitectureBoard Features Product DescriptionChapter Chapter Block Diagram ATAMajor Integrated Circuits ICs Chip Type Mfg Model Description FunctionCPU VIAConnector Definitions Switch DefinitionJack # Signal/Device Description Component DescriptionAll illustrations Lvds J7Additional Components IllustrationsPower/IDE LED Definitions Jumper # Installed RemovedIndicator Definition Jumper DefinitionsJumper, Switch, and LED Locations Top view Specifications Physical SpecificationsPower Specifications Environmental SpecificationsMechanical Specifications Thermal/Cooling RequirementsReadyBoard 700 Side view Chapter Hardware OverviewCPU U4 MemorySdram Memory DIMM1 Flash MemoryInterrupt Channel Assignments Memory MapAddress Map Base Address FunctionAddress hex Subsystem CF8-CFFPin # Signal Input Description Output PC/104-Plus Interface J12REQ0 GNT1CLK2 PerrREQ2 CLK0Intd IntaIDSEL1 REQ1GNT2 CLK3IDSEL2 IDSEL3GNT0 CLK1Pin # Signal Description J13 Row a PC/104 Interface J13 A/B, J14 C/DPin # Signal Descriptions J13 Row B Pin # Signal Descriptions J14 Row C Pin # Signal Descriptions J14 Row D DRQ0 DACK5DRQ5 DACK6Pin # Signal Description IDE Interface J22Pdiow PdiorPdiordy PdcselCompactFlash Adapter J23 CFD2 CFD1SDD11 SDD12Floppy/Parallel Interface J20 Slctin StepAutofdx DrvenoSerial Interfaces J5A/B, J3A/B RS485 Serial Port ImplementationSerial a Interface J5A/B Serial B Interface J3A/B CTS4 DTR4Secondary USB2 and USB3 J21A/B USB Interfaces J15A/B, J21A/BPrimary USB0 and USB1 J15A/B Digital Ground Ethernet Interfaces J10, J11Pin # Audio Interface J19 Video Interfaces J8, J9, J7 CRT Interface J8LCD Interface J9 Pin # Signal Description Line Channel Lvds Interface J7Reset Switch SW1 MiscellaneousUtility Interface J18 Keyboard/Mouse Interface J16Oops! Jumper Bios Recovery Infrared IrDA Port J17Real Time Clock RTC IrtxSerial Console User Gpio Signals J2Temperature Monitoring Watchdog Timer Serial Console SetupPower Interfaces J4, J6 Power In Interface J4Power-On Interface J6 VccsbReference Manual ReadyBoard Accessing Bios Setup VGA Display IntroductionAccessing Bios Setup Serial Console Bios Setup Menu Item/TopicBios Menus Bios Setup Opening ScreenDrive Assignments Bios Configuration ScreenDate & Time # of Floppy Drives Bios Settings Boot OrderDrive and Boot Options Memory Keyboard and Mouse ConfigurationUser Interface Power Management Advanced featuresChapter Bios Setup On-Board Serial Ports On-Board LPT PortOn-Board Controllers On-Board VideoLCD Resolution Panel Type 640 x 480 x 18 TFTType 640 x 480 x 18 bitChapter Bios Setup Chapter Bios Setup Chapter Bios Setup Converting the Splash Screen File Splash Screen CustomizationSplash Screen Image Requirements \splashconvert convert.idf Reference Manual ReadyBoard Appendix a Technical Support Method Contact InformationAppendix a Appendix B LAN Boot Option PXE Boot Agent Bios Setup Accessing PXE Boot Agent Bios SetupTCP/IP Configuration PXE Boot Agent Setup ScreenPXE Configuration NetWare Configuration RPL ConfigurationCD-ROM LEDRTC PostWatchdog timer WDT Table notes Reference Manual ReadyBoard