Ampro Corporation 700 manual Audio Interface J19

Page 51

Chapter 3

 

 

Hardware

Table 3-18. Ethernet Port 2 Pin/Signal Descriptions (J11)

 

 

 

 

 

 

 

Pin #

GND

Digital Ground

 

 

1

TX2+

Analog Twisted Pair Ethernet Transmit Differential Pair. These pins transmit

 

 

 

 

 

the serial bit stream for transmission on the Unshielded Twisted Pair Cable

 

 

3

TX2-

 

 

(UTP). These signals interface directly with an isolation transformer.

 

 

 

 

 

 

 

 

 

 

 

 

 

4

RX2+

Analog Twisted Pair Ethernet Receive Differential Pair. These pins receive

 

 

 

 

 

the serial bit stream from the isolation transformer.

 

 

6

RX2-

 

 

 

 

 

9

ACT

Link/Activity signal indicates a Link is established or Activity is occurring

 

 

 

 

 

 

 

 

11

SPEED

Speed signal for 10BaseT or 100BaseT transfer rate

 

 

 

 

 

 

 

 

2, 7, 8

 

NC

Not connected

 

 

5, 13, 14

GND

Grounded (goes to ground through 0.1∝ capacitor)

 

 

10, 12

 

+3VSB

+3V for plus side of LEDs. See Table 2-7.

 

 

 

 

 

 

 

Notes: The shaded area denotes power or ground.

Audio Interface (J19)

The audio solution on the ReadyBoard 700 is provided by the Southbridge (VT82C686B) and the ion board Audio CODEC (VT1612A). These two chips communicate through a digital interface, defined by and compliant with AC’97 Rev 2.2. Input or output signals for the audio interface go through the 16- pin connector (J19) to an external cable and/or board, which has the respective audio connections. The PC-Beep Speaker signal from the Southbridge is also fed to the on board Audio CODEC to provide a PC-beep signal for the stereo line out connections.

Audio CODEC (VT1612A) features

AC’97 Rev 2.2 compliant

18-bit full duplex performance

Variable sampling rate at 1Hz resolution

Stereo (Left and Right) Line In

Stereo (Left and Right) Line Out

Microphone (mono) in

PC-Beep speaker signal through the Stereo (Left and Right) Line Out connections

Table 3-19. Audio Interface Pin/Signal Descriptions (J19)

Pin # Signal

Description

1, 3

NC

Not Connected

 

 

 

 

2, 4, 7, 8, 11,

GND_AUD

Audio ground

12, 13, 14, 16

 

 

5

LINEOUTL

Line Out signal left channel

 

 

 

6

LINEOUTR

Line Out signal right channel

 

 

 

9

LINE_IN_L

Line in signal left channel

 

 

 

10

LINE_IN_R

Line in signal right channel

 

 

 

15

MICIN

Microphone signal in

 

 

 

 

Notes: The shaded area denotes power or ground.

ReadyBoard 700

Reference Manual

45

Image 51
Contents ReadyBoard Single Board Computer Reference Manual Revision History Audience AssumptionsContents Appendix a List of Tables Reference Manual ReadyBoard Specifications Purpose of this ManualReference Material Other Ampro Products Related Ampro ProductsReadyBoard 700 Support Products Other ReadyBoard ProductsChapter Reference Manual ReadyBoard Epic Architecture Product OverviewProduct Description Board FeaturesChapter Chapter ATA Block DiagramVIA Major Integrated Circuits ICsChip Type Mfg Model Description Function CPUComponent Description Connector DefinitionsSwitch Definition Jack # Signal/Device DescriptionLvds J7 All illustrationsIllustrations Additional ComponentsJumper Definitions Power/IDE LED DefinitionsJumper # Installed Removed Indicator DefinitionJumper, Switch, and LED Locations Top view Environmental Specifications SpecificationsPhysical Specifications Power SpecificationsThermal/Cooling Requirements Mechanical SpecificationsReadyBoard 700 Side view Overview Chapter HardwareFlash Memory CPU U4Memory Sdram Memory DIMM1Memory Map Interrupt Channel AssignmentsCF8-CFF Address MapBase Address Function Address hex SubsystemPC/104-Plus Interface J12 Pin # Signal Input Description OutputPerr REQ0GNT1 CLK2Inta REQ2CLK0 IntdCLK3 IDSEL1REQ1 GNT2CLK1 IDSEL2IDSEL3 GNT0PC/104 Interface J13 A/B, J14 C/D Pin # Signal Description J13 Row aPin # Signal Descriptions J13 Row B Pin # Signal Descriptions J14 Row C Pin # Signal Descriptions J14 Row D DACK6 DRQ0DACK5 DRQ5IDE Interface J22 Pin # Signal DescriptionPdcsel PdiowPdior PdiordyCompactFlash Adapter J23 SDD12 CFD2CFD1 SDD11Floppy/Parallel Interface J20 Drveno SlctinStep AutofdxRS485 Serial Port Implementation Serial Interfaces J5A/B, J3A/BSerial a Interface J5A/B Serial B Interface J3A/B DTR4 CTS4USB Interfaces J15A/B, J21A/B Primary USB0 and USB1 J15A/BSecondary USB2 and USB3 J21A/B Ethernet Interfaces J10, J11 Pin #Digital Ground Audio Interface J19 CRT Interface J8 Video Interfaces J8, J9, J7LCD Interface J9 Lvds Interface J7 Pin # Signal Description Line ChannelKeyboard/Mouse Interface J16 Reset Switch SW1Miscellaneous Utility Interface J18Irtx Oops! Jumper Bios RecoveryInfrared IrDA Port J17 Real Time Clock RTCUser Gpio Signals J2 Temperature MonitoringSerial Console Serial Console Setup Watchdog TimerVccsb Power Interfaces J4, J6Power In Interface J4 Power-On Interface J6Reference Manual ReadyBoard Introduction Accessing Bios Setup VGA DisplayBios Setup Menu Item/Topic Accessing Bios Setup Serial ConsoleBios Setup Opening Screen Bios MenusBios Configuration Screen Date & TimeDrive Assignments Boot Order # of Floppy Drives Bios SettingsDrive and Boot Options Keyboard and Mouse Configuration User InterfaceMemory Advanced features Power ManagementChapter Bios Setup On-Board LPT Port On-Board Serial PortsOn-Board Video On-Board Controllers640 x 480 x 18 bit LCD ResolutionPanel Type 640 x 480 x 18 TFT TypeChapter Bios Setup Chapter Bios Setup Chapter Bios Setup Splash Screen Customization Splash Screen Image RequirementsConverting the Splash Screen File \splashconvert convert.idf Reference Manual ReadyBoard Method Contact Information Appendix a Technical SupportAppendix a Appendix B LAN Boot Option Accessing PXE Boot Agent Bios Setup PXE Boot Agent Bios SetupPXE Boot Agent Setup Screen PXE ConfigurationTCP/IP Configuration RPL Configuration NetWare ConfigurationLED CD-ROMPost RTCWatchdog timer WDT Table notes Reference Manual ReadyBoard