Texas Instruments TMS320F20x/F24x DSP manual Read Modes

Read Modes

PRELIMINARY

2.4 Read Modes

The 'F20x/F24x flash module uses four read modes and corresponding sets of reference levels:

-Standard

-Verify 0s (VER0)

-Verify 1s (VER1)

-Inverse-erase

Read mode selection is accomplished through the verify bits (bits 3 and 4) in SEG_CTR during execution of the algorithms.

In the standard read mode of the 'F20x/F24x flash module, the supply voltage (VDD) is internally applied to the cell to select it for reading. The VER0, VER1, and inverse-erase read modes differ from the standard read mode in the inter- nal voltage level applied to the flash cell.

Because the program and erase operations must provide sufficient margin on 1s and 0s to ensure data retention, the verify 0s (VER0) and verify 1s (VER1), are provided on the flash module to check for sufficient margin.

The VER0 and VER1 read modes provide a method for adjusting the level on the cells during programming or erasing, beyond the point required for reading a 0 or a 1, creating the required logic level margin. In VER0 mode, a voltage closer to an ideal logic zero level than necessary to read a logic zero is internal- ly applied to the cell to select it for reading. This is the worst-case condition for reading a programmed cell, and if a cell can be read as 0 in VER0 mode, then it can also be read as 0 in standard read mode. Similarly, in the VER1 read mode, a voltage closer to an ideal logic one level than necessary to read a logic one is internally applied to the cell to select it for reading. This is the worst-case condition for reading an erased cell, and if a cell can be read as 1 in the VER1 mode, then it can be read as 1 in standard read mode.

The inverse-erase read mode detects flash bits that are in depletion mode. This read mode applies a voltage to all array cells so that all cells are dese- lected. The entire array can be tested for bits in depletion mode by reading the first row (32 words) of the array in inverse-erase read mode. If there are no bits in depletion mode, all 32 words are read as 0000h.

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