Texas Instruments TMS320F20x/F24x DSP Rowdone Lacl Fladrs, Bcnd DONE, GT, Lacl Fladrs Newrow

AR4,FL_ADRS #0,FL_ST AR0,#4000H 1

FL0,TC

;AR4 = current address. ;FL_ST = FLASH0 CTRL REGS ;AR0 = compare value. ;If AR4 < AR0 then ;FL_ADRS < 4000H; SET TC ;Address is in FL0. ;Else address is in FL1.

Assembly Source for Algorithms

PRELIMINARY

BCND	EXIT,TC	;fail, don't continue.
B	SAMEROW	;else, go to beginning
		;of same row.

**If row done, then check if Array done. *

ROW_DONE

LACL	FL_ADRS	;Check if end of array.
SUB	BASE_4	;Subtract end addr.
BCND	DONE, GT	;If >0 then done.

**Else, go to next row. *

LACL FL_ADRS

B NEWROW ;Start new row.

**If here, then done.

DONE

CALL	ARRAY	;Access flash in array mode.
RET		;Return to calling program.
** If here, then unit failed to program. *
EXIT SPLK	#1,ERROR	;Update error flag (error).
B	DONE	;Get outa here.
************************************************
.page
************************************************
* ADJ_ROW: This routine is used to adjust the			*
* row length, if the start or end address of			*
* code being programmed does not fall on a row *
* boundary. The row length is passed in the			*
* BASE_2 variable, and the adjustment value to *
* be subtracted is passed in the accumulator. *
***********************************************
ADJ_ROW
NEG		;Take twos complement.
ADD	BASE_2	;Add row length.
SACL	BASE_2	;Save new row length.
RET

*************************************************
*	SET_MODULE: This routine is used to point to			*
*	the appropriate flash array control register			*
*	This is only important for 'F2XX devices with			*
*	multiple flash modules like the 320F206. The			*
*	variable FL_ST is returned with the correct *
*	register address.		*
*	The following resources are used		*
*	temporarily:		*
*	AR0	Used for comparisons	*
*	AR4	Used for flash address	*

***************************************************

SET_MODULE LAR SPLK LAR CMPR

BCND

*

A-22 PRELIMINARY