Canopy T1/E1 Multiplexer | September 2004 | |
| T1/E1 Multiplexer FPGA Version 3.4 | |
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Desired Action | Syntax, Response, and Description |
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Get the timing mode | Enter get clock source |
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| The system responds |
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| Clock source set to [loopback/recovered] |
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| Gets the T1 timing mode. This timing mode applies for all four T1 lines. | |
| Loopback mode means to take the T1 Tx clock and loop it back to the | |
| T1 Rx. Recovered mode means to recover the T1 clock from the | |
| incoming T1 over Ethernet bit stream, in other words to recover the | |
| clock from the far end T1. |
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Get the master | Enter get master clock reference line |
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clock reference line |
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| The system responds Clk ref line: [1/2/3/4] |
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| NOTE: [1/2/3/4] represents T1/E1 ports 1 through 4. |
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| Displays the T1 master clock reference line. This clock reference | |
| applies for all four T1 lines. |
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Get the secondary | Enter get secondary clock reference line |
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clock reference line |
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| The system responds Backup clk ref line; [1/2/3/4] | |
| NOTE: [1/2/3/4] represents T1/E1 ports 1 through 4. | |
| Displays the T1/E1 secondary or backup clock reference line. This | |
| clock reference is the backup clock reference for all four T1/E1 lines. | |
| The backup clock reference will become active only when the master | |
| clock reference line is unavailable. |
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Issue 3 | Page 69 of 73 |