Analog Devices ADSP-2183, ADSP-2181 manual Grade Parameter Min Max Unit

ADSP-2181–SPECIFICATIONS

RECOMMENDED OPERATING CONDITIONS

			K Grade		B Grade
Parameter		Min	Max	Min	Max	Unit
VDD	Supply Voltage	4.5	5.5	4.5	5.5	V
TAMB	Ambient Operating Temperature	0	+70	–40	+85	°C

ELECTRICAL CHARACTERISTICS

				K/B Grades
Parameter		Test Conditions	Min	Max	Unit
VIH	Hi-Level Input Voltage1, 2	@ VDD = max	2.0		V
VIH	Hi-Level CLKIN Voltage	@ VDD = max	2.2		V
VIL	Lo-Level Input Voltage1, 3	@ VDD = min		0.8	V
VOH	Hi-Level Output Voltage1, 4, 5	@ VDD = min
		IOH = –0.5 mA	2.4		V
		@ VDD = min
VOL	Lo-Level Output Voltage1, 4, 5	IOH = –100 μA6	VDD – 0.3		V
		@ VDD = min
IIH	Hi-Level Input Current3	IOL = 2 mA		0.4	V
		@ VDD = max			μA
IIL	Lo-Level Input Current3	VIN = VDD max		10
		@ VDD = max			μA
IOZH	Three-State Leakage Current7	VIN = 0 V		10
		@ VDD = max,			μA
IOZL	Three-State Leakage Current7	VIN = VDD max8		10
		@ VDD = max,			μA
IDD	Supply Current (Idle)9, 10	VIN = 0 V8		10
		@ VDD = max		16.5	mA
IDD	Supply Current (Dynamic)10, 11	@ VDD = max
CI	Input Pin Capacitance3, 6, 13	tCK = 30 ns12		100	mA
		@ VIN = 2.5 V,
		fIN = 1.0 MHz,
CO	Output Pin Capacitance6, 7, 13, 14	TAMB = +25°C		8	pF
		@ VIN = 2.5 V,
		fIN = 1.0 MHz,
		TAMB = +25°C		8	pF

NOTES

1Bidirectional pins: D0–D23, RFS0, RFS1, SCLK0, SCLK1, TFS0, TFS1, IAD0–IAD15, PF0–PF7.

2Input only pins: RESET, IRQ2, BR, MMAP, DR0, DR1, PWD, IRQL0, IRQL1, IRQE, IS, IRD, IWR, IAL.

3Input only pins: CLKIN, RESET, IRQ2, BR, MMAP, DR0, DR1, IS, IAL, IRD, IWR, IRQL0, IRQL1, IRQE, PWD.

4Output pins: BG, PMS, DMS, BMS, IOMS, CMS, RD, WR, IACK, PWDACK, A0–A13, DT0, DT1, CLKOUT, FL2-0.

5Although specified for TTL outputs, all ADSP-2181 outputs are CMOS-compatible and will drive to V DD and GND, assuming no dc loads. 6Guaranteed but not tested.

7Three-statable pins: A0–A13, D0-D23, PMS, DMS, BMS, IOMS, CMS, RD, WR, DT0, DT1, SCLK0, SCLK1, TFS0, TFS1, RFS0, RSF1, IAD0–IAD15, PF0–PF7.

80 V on BR, CLKIN Active (to force three-state condition).

9Idle refers to ADSP-2181 state of operation during execution of IDLE instruction. Deasserted pins are driven to either V DD or GND.

10Current reflects device operating with no output loads.

11IDD measurement taken with all instructions executing from internal memory. 50% of the instructions are multifunction (types 1, 4, 5, 12, 13, 14), 30% are type 2 and type 6, and 20% are idle instructions.

12VIN = 0.4 V and 2.4 V. For typical figures for supply currents, refer to “Power Dissipation” section.

13Applies to TQFP and PQFP package types.

14Output pin capacitance is the capacitive load for any three-stated output pin.

Specifications subject to change without notice.

–12– REV. 0