Analog Devices ADSP-2181, ADSP-2183 manual PF0

Page 35

ADSP-2181/ADSP-2183

PQFP Pin Configurations

PQFP		Pin						PQFP		Pin													PQFP		Pin				PQFP		Pin
Number	Name							Number	Name														Number	Name					Number	Name

1		PF0						33															65						97		D23
										PWD															EBR
2		WR						34		IRQ2													66		BR				98		GND
3		RD						35		BMODE													67		EBG				99		IWR
4		IOMS						36		PWDACK													68		BG				100		IRD
5		BMS						37		IACK													69		VDD				101		IAD15
6		DMS						38		BGH													70		D0				102		IAD14
7		CMS						39		VDD													71		D1				103		IAD13
8		GND						40		GND													72		D2				104		IAD12
9		VDD						41		IRQL0													73		D3				105		IAD11
10		PMS						42		IRQL1													74		D4				106		IAD10
11		A0						43		FL0													75		GND				107	IAD9
12		A1						44		FL1													76		D5				108	IAD8
13		A2						45		FL2													77		D6				109	IAD7
14		A3						46		DT0													78		D7				110	IAD6
15		A4						47		TFS0													79		D8				111	VDD
16		A5						48		RFS0													80	D9					112	GND
17		A6						49		DR0													81	D10					113	IAD5
18		A7						50		SCLK0													82		D11				114	IAD4
19		XTAL						51		DT1/FO													83	D12					115	IAD3
20		CLKIN						52		TFS1/								IRQ1					84		D13				116	IAD2
21		GND						53		RFS1/							IRQ0						85		D14				117	IAD1
22		CLKOUT						54	GND														86		GND				118	IAD0
23		GND						55		DR1/FI													87	VDD					119	PF7
24		VDD						56		SCLK1													88		GND				120	PF6
25		A8						57		ERESET													89		D15				121	PF5
26		A9						58		RESET													90		D16				122	PF4
27		A10						59		EMS													91		D17				123	GND
28		A11						60		EE													92	D18					124		IS
29		A12						61		ECLK													93	D19					125	IAL
30		A13						62		ELOUT													94	D20					126	PF3
31		IRQE						63		ELIN													95	D21					127	PF2
32		MMAP						64		EINT													96		D22				128	PF1

REV. 0

–35–

Image 35

Contents General Description Functional Block DiagramArchitecture Overview ADSP-2181/ADSP-2183ADSP-2181/ADSP-2183 Integration PIN Descriptions Pin Input Names Pins Output FunctionLowest Priority Interrupt VectorSource of Interrupt Address Hex Highest PriorityADSP-2181 ADSP-2183 System InterfaceMemory A13 A120 PmovlayMemory Space Word Size Alignment Address Range Wait State RegisterInternal Idma Port Booting Booting MethodDesigning AN EZ-ICE-COMPATIBLE System Syntax IOaddr = dreg dreg = IOaddrBiased Rounding Instruction SET DescriptionPM, DM, BM, IOM, & CM Reset GNDGrades Parameter Test Conditions Min Max Unit Grade Parameter Min Max UnitESD Sensitivity Memory Timing SpecificationsFrequency Dependency for Timing Specifications Absolute Maximum Ratings41C/W 10C/W 31C/W Package50C/W 2C/W 48C/W Test Conditions Capacitive LoadingADSP-2183-SPECIFICATIONS ADSP-2183 Timing Parameters Tqfp Delay Valid Output 28.8 MHz Parameter Min Max Clock Signals and Reset Parameter Min Max Unit Clock Signals and ResetControl Signals Flag Output Hold after Clkout Low5 5tCK FI, or PFx Setup before Clkout Low1, 2, 3 25tCK + IRQxFlag Output Delay from Clkout Low5 25tCK + Parameter Min Max Unit Interrupts and FlagParameter Min Max Unit Bus Request/Grant 28.8 MHz Parameter Min Max Unit Memory Read Parameter Min Max Unit Memory ReadParameter Min Max Unit Memory Write Parameter Min Max Unit Serial Ports Parameter Min Max Unit Idma Address Latch Parameter Min Max Idma Write, Short Write Cycle Parameter Min Max Unit Idma Write, Short Write Cycle28.8 MHz Parameter Min Max Unit Idma Write, Long Write Cycle 28.8 MHz Parameter Min Max Unit Idma Read, Long Read Cycle Parameter Min Max Unit Idma Read, Long Read Cycle28.8 MHz Parameter Min Max Unit Idma Read, Short Read Cycle Parameter Min Max Unit Idma Read, Short Read CycleLead Tqfp Package Pinout Number Name PinOutline Dimensions Millimeters Inches Symbol MIN TYP MAXLead Pqfp Package Pinout PF0 160 Ordering Guide Page Page C2144-16-6/96