Cypress CY7C1382D, CY7C1380F 3V TAP AC Test Conditions, 5V TAP AC Test Conditions, GND VIN Vddq

Page 15

CY7C1380D, CY7C1382D CY7C1380F, CY7C1382F

3.3V TAP AC Test Conditions

Input pulse levels

 

 

 

 

 

VSS to 3.3V

Input rise and fall times

 

 

 

 

 

1 ns

Input timing reference levels

 

 

 

........................

 

1.5V

Output reference levels

 

 

 

 

1.5V

Test load termination supply voltage

.................

 

 

 

 

.............1.5V

Figure 7. 3.3V TAP AC Output Load Equivalent

 

 

 

 

 

 

 

1.5V

 

 

 

 

 

 

 

 

 

 

 

 

 

50Ω

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ZO= 50 Ω

 

 

 

 

 

 

20pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2.5V TAP AC Test Conditions

Input pulse levels

 

 

 

 

 

 

VSS to 2.5V

Input rise and fall time

 

 

 

 

 

 

1 ns

Input timing reference levels

......................

 

 

 

 

1.25V

Output reference levels

 

 

 

 

 

1.25V

Test load termination supply voltage

 

 

 

 

 

 

........1.25V

Figure 8. 2.5V TAP AC Output Load Equivalent

 

 

 

 

 

1.25V

 

 

 

 

 

 

 

 

 

 

 

50Ω

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ZO= 50 Ω

 

 

 

 

 

 

20pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TAP DC Electrical Characteristics And Operating Conditions

 

 

 

(0°C < TA < +70°C; V = 3.3V ±0.165V unless otherwise noted) [12]

 

 

 

 

 

DD

 

 

 

 

 

 

Parameter

Description

Test Conditions

Min

Max

Unit

VOH1

Output HIGH Voltage

IOH = –4.0 mA, VDDQ = 3.3V

2.4

 

V

 

 

IOH = –1.0 mA, VDDQ = 2.5V

2.0

 

V

VOH2

Output HIGH Voltage

IOH = –100 µA

 

VDDQ = 3.3V

2.9

 

V

 

 

 

 

VDDQ = 2.5V

2.1

 

V

VOL1

Output LOW Voltage

IOL = 8.0 mA

 

VDDQ = 3.3V

 

0.4

V

 

 

 

 

VDDQ = 2.5V

 

0.4

V

VOL2

Output LOW Voltage

IOL = 100 µA

 

VDDQ = 3.3V

 

0.2

V

 

 

 

 

VDDQ = 2.5V

 

0.2

V

VIH

Input HIGH Voltage

 

 

VDDQ = 3.3V

2.0

VDD + 0.3

V

 

 

 

 

VDDQ = 2.5V

1.7

VDD + 0.3

V

VIL

Input LOW Voltage

 

 

VDDQ = 3.3V

–0.3

0.8

V

 

 

 

 

VDDQ = 2.5V

–0.3

0.7

V

IX

Input Load Current

GND < VIN < VDDQ

 

 

–5

5

µA

Note

12. All voltages referenced to VSS (GND).

Document #: 38-05543 Rev. *F

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Contents Description 250 MHz 200 MHz 167 MHz Unit FeaturesFunctional Description Selection GuideLogic Block Diagram CY7C1382D/CY7C1382F 3 1M x Logic Block Diagram CY7C1380D/CY7C1380F 3 512K xPin Tqfp Pinout 3-Chip Enable Pin ConfigurationsBall BGA Pinout Ball Fbga Pinout 3-Chip Enable Ground for the core of the device Power supply inputs to the core of the devicePower supply for the I/O circuitry Pin Definitions Name DescriptionPin Definitions TMSTCK Jtag Functional Overview Single Write Accesses Initiated by AdspSingle Read Accesses Single Write Accesses Initiated by AdscA1 A0 Parameter Description Test Conditions Min Sleep ModeBurst Sequences AddressOperation Add. Used Truth TableTruth Table for Read/Write 4 Function CY7C1380D/CY7C1380FFunction CY7C1382D/CY7C1382F TAP Controller State Diagram TAP Controller Block DiagramIeee 1149.1 Serial Boundary Scan Jtag Bypass Register TAP Instruction SetClock TAP TimingReserved Parameter Description MinParameter Description Test Conditions Min TAP DC Electrical Characteristics And Operating Conditions3V TAP AC Test Conditions 5V TAP AC Test ConditionsRegister Name Bit Size Identification Register DefinitionsScan Register Sizes Identification CodesBit # Ball ID Ball BGA Boundary Scan Order 14A10 B10 P10 Range Ambient Electrical Characteristics Over the Operating RangeMaximum Ratings Operating RangeEIA/JESD51 CapacitanceThermal Resistance Package5V I/O Test Load AC Test Loads and Waveforms 3V I/O Test LoadSwitching Characteristics Over the Operating Range 20 Setup TimesOutput Times Read Cycle Timing Switching WaveformsWrite Cycle Timing 26 Read/Write Cycle Timing 26, 28 ZZ Mode Timing 30 Ordering Information 200 167 Pin Thin Plastic Quad Flat Pack 14 x 20 x 1.4 mm Package DiagramsBall BGA 14 x 22 x 2.4 mm Soldernotespad Type NON-SOLDER Mask Defined Nsmd Submission Orig. Description of Change Date Document HistorySales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsUSB