Cypress CY7C1362C manual Ball Fbga Boundary Scan Order, CY7C1360C 256K x Bit# Ball ID Signal, Name

Page 16

CY7C1360C

CY7C1362C

165-ball FBGA Boundary Scan Order

CY7C1360C (256K x 36)

Bit#

ball ID

Signal

Bit#

ball ID

Signal

Name

1

B6

CLK

37

R6

A0

2

B7

38

P6

A1

GW

3

A7

39

R4

A

BWE

4

B8

40

P4

A

OE

5

A8

41

R3

A

ADSC

6

B9

42

P3

A

ADSP

7

A9

43

R1

MODE

ADV

8

B10

A

44

N1

DQPD

9

A10

A

45

L2

DQD

10

C11

DQPB

46

K2

DQD

11

E10

DQB

47

J2

DQD

12

F10

DQB

48

M2

DQD

13

G10

DQB

49

M1

DQD

14

D10

DQB

50

L1

DQD

15

D11

DQB

51

K1

DQD

16

E11

DQB

52

J1

DQD

17

F11

DQB

53

Internal

18

G11

DQB

54

G2

DQC

19

H11

ZZ

55

F2

DQC

20

J10

DQA

56

E2

DQC

21

K10

DQA

57

D2

DQC

22

L10

DQA

58

G1

DQC

23

M10

DQA

59

F1

DQC

24

J11

DQA

60

E1

DQC

25

K11

DQA

61

D1

DQC

26

L11

DQA

62

C1

DQPC

27

M11

DQA

63

B2

A

28

N11

DQPA

64

A2

A

29

R11

A

65

A3

CE1

30

R10

A

66

B3

CE2

31

P10

A

67

B4

BWD

32

R9

A

68

A4

C

BW

33

P9

A

69

A5

B

BW

34

R8

A

70

B5

A

BW

35

P8

A

71

A6

3

CE

36

P11

A

CY7C1362C (512K x 18)

Bit#

ball ID

Signal

Bit#

ball ID

Signal

Name

1

B6

CLK

37

R6

A0

2

B7

38

P6

A1

GW

3

A7

39

R4

A

BWE

4

B8

40

P4

A

OE

5

A8

41

R3

A

ADSC

6

B9

42

P3

A

ADSP

7

A9

43

R1

MODE

ADV

8

B10

A

44

Internal

9

A10

A

45

Internal

10

A11

A

46

Internal

11

Internal

47

Internal

12

Internal

48

N1

DQPB

13

Internal

49

M1

DQB

14

C11

DQPA

50

L1

DQB

15

D11

DQA

51

K1

DQB

16

E11

DQA

52

J1

DQB

17

F11

DQA

53

Internal

18

G11

DQA

54

G2

DQB

19

H11

ZZ

55

F2

DQB

20

J10

DQA

56

E2

DQB

21

K10

DQA

57

D2

DQB

22

L10

DQA

58

Internal

23

M10

DQA

59

Internal

24

Internal

60

Internal

25

Internal

61

Internal

26

Internal

62

Internal

27

Internal

63

B2

A

28

Internal

64

A2

A

29

R11

A

65

A3

CE1

30

R10

A

66

B3

CE2

31

P10

A

67

Internal

32

R9

A

68

Internal

33

P9

A

69

A4

B

BW

34

R8

A

70

B5

A

BW

35

P8

A

71

A6

3

CE

36

P11

A

Document #: 38-05540 Rev. *H

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Contents Features Logic Block Diagram CY7C1362C 512K xFunctional Description1 Cypress Semiconductor CorporationMaximum Access Time Maximum Operating Current Selection Guide250 MHz 200 MHz 166 MHz Unit Maximum Cmos Standby Current Document # 38-05540 Rev. *HCY7C1360C 256K X Pin Configurations Pin Tqfp Pinout 3 Chip Enables a VersionCY7C1362C 512K x Pin Configurations Pin Tqfp Pinout 2 Chip Enables AJ Version CY7C1362CPin Configurations Ball BGA Pinout 2 Chip Enables with Jtag NC/576MNC/72M NC/36M NC/288MNC/18M Pin Configurations Ball Fbga Pinout 3 Chip Enable with JtagNC/72M Pin Definitions Single Read Accesses Single Write Accesses Initiated by AdspSingle Write Accesses Initiated by Adsc Functional OverviewLinear Burst Address Table Mode = GND Interleaved Burst Address Table Mode = Floating or VDDZZ Mode Electrical Characteristics Partial Truth Table for Read/Write5 Read Cycle, Continue Burst NextWrite Cycle, Continue Burst Next Read Cycle, Suspend Burst Write Cycle, Suspend BurstDisabling the Jtag Feature Test Access Port TAPTruth Table for Read/Write5 Ieee 1149.1 Serial Boundary Scan JtagTAP Controller Block Diagram Performing a TAP ResetTAP Registers TAP Instruction SetTAP Timing IdcodeTAP AC Switching Characteristics Over the Operating Range10 TAP DC Electrical Characteristics And Operating Conditions3V TAP AC Test Conditions 5V TAP AC Test ConditionsScan Register Sizes Identification Register DefinitionsIdentification Codes CY7C1360C 256K x Bit# Ball ID Signal CY7C1362C 512K x Bit# Ball ID SignalBall Fbga Boundary Scan Order NameCY7C1362C 512K x Bit# Ball ID Signal Name Ball BGA Boundary Scan OrderElectrical Characteristics Over the Operating Range14 Maximum RatingsOperating Range Ambient RangeCapacitance16 Thermal ResistanceAC Test Loads and Waveforms 3V I/O Test LoadSwitching Characteristics Over the Operating Range 17 250 200 166 Parameter Description Unit MinMin Max Set-up TimesSwitching Waveforms Read Cycle Timing23Write Cycle Timing23 BWE BWX ADVRead/Write Cycle Timing23, 25 CLZZZ Mode Timing27 DON’T CareOrdering Information CY7C1360C CY7C1362C CY7C1360C CY7C1362C Package Diagrams Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mmBall Pbga 14 x 22 x 2.4 mm 90±0.05Soldernotespad Type NON-SOLDER Mask Defined Nsmd Issue Date Orig. Description of Change Document History