Cypress CY7C1472BV33, CY7C1470BV33 manual Ball Fbga 14 x 22 x 1.76 mm Pinout CY7C1474BV33 1M ×

Page 6

CY7C1470BV33

CY7C1472BV33, CY7C1474BV33

Pin Configurations (continued)

209-Ball FBGA (14 x 22 x 1.76 mm) Pinout CY7C1474BV33 (1M × 72)

1

2

3

4

5

6

7

8

9

10

11

A

DQg

A

CE2

A

3

A

DQb

ADV/LD

CE

B

DQg

c

g

NC

A

b

f

DQb

BWS

WE

BWS

C

DQg

h

d

NC/576M

1

NC

e

a

DQb

BWS

CE

BWS

D

DQg

VSS

NC/1G

NC

VSS

NC

OE

DQb

E

DQPg

DQPc

VDDQ

VDD

VDDQ

DQPf

DQPb

F

DQc

VSS

NC

VSS

DQf

G

DQc

VDDQ

VDD

NC

VDD

VDDQ

DQf

H

DQc

VSS

NC

VSS

DQf

J

DQc

VDDQ

VDD

NC

VDD

VDDQ

DQf

K

NC

CLK

NC

VSS

CEN

NC

L

DQh

VDDQ

VDD

NC

VDD

VDDQ

DQa

M

DQh

VSS

NC

VSS

DQa

N

DQh

VDDQ

VDD

NC

VDD

VDDQ

DQa

P

DQh

VSS

ZZ

VSS

DQa

R

DQPd

DQPh

VDDQ

VDD

VDDQ

DQPa

DQPe

T

DQd

VSS

NC

MODE

NC

VSS

DQe

U

DQd

NC/144M

A

NC/288M

DQe

V

DQd

A

A1

A

DQe

W

DQd

TMS

TDI

A

A0

A

TDO

TCK

DQe

Document #: 001-15031 Rev. *C

Page 6 of 30

[+] Feedback

Image 6

Contents Description 250 MHz 200 MHz 167 MHz Unit Functional DescriptionSelection Guide Cypress Semiconductor Corporation 198 Champion CourtLogic Block Diagram CY7C1470BV33 2M x Logic Block Diagram CY7C1472BV33 4M xLogic Block Diagram CY7C1474BV33 1M x ADV/LDPin Configurations Pin Tqfp PinoutTDI TDO CENNC/1G CE2 CLK ModeBall Fbga 14 x 22 x 1.76 mm Pinout CY7C1474BV33 1M × Pin Definitions Pin Name IO Type Pin Description Byte Write Select Inputs, Active LOW. Qualified withFunctional Overview ZZ Mode Electrical Characteristics Parameter Description Test Conditions Min Max UnitTruth Table Operation Address UsedFunction CY7C1472BV33 Partial Write Cycle DescriptionFunction CY7C1470BV33 BW d BW c BW b BW a Function CY7C1474BV33TAP Controller State Diagram Ieee 1149.1 Serial Boundary Scan JtagTAP Instruction Set TAP Timing Output Times TAP AC Switching CharacteristicsParameter Description Min Max Unit Clock Hold Times5V TAP AC Test Conditions TAP DC Electrical Characteristics And Operating Conditions3V TAP AC Test Conditions GND VIN VddqScan Register Sizes Register Name Bit Size Identification Codes Instruction DescriptionBoundary Scan Exit Order 2M x Bit # Ball ID Boundary Scan Exit Order 4M x Bit # Ball IDE10 Boundary Scan Exit Order 1M xBit # Ball ID V10Operating Range Electrical CharacteristicsMaximum Ratings Range AmbientCapacitance Thermal ResistanceAC Test Loads and Waveforms Switching Characteristics Setup TimesParameter Description 250 200 167 Unit Min Max Data Switching WaveformsADV/LD Address A3 A4NOP, Stall and Deselect Cycles Ordering Information 250 Package Diagrams Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mmBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm VKN/AESA ECN No Issue Date Orig. Description of ChangeVKN/KKVTMP VKN