Cypress CY7C1470BV33, CY7C1474BV33, CY7C1472BV33 manual 250

Page 26

CY7C1470BV33

CY7C1472BV33, CY7C1474BV33

Ordering Information (continued)

Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or visit www.cypress.com for actual products offered.

Speed

Ordering Code

Package

Part and Package Type

Operating

(MHz)

Diagram

Range

 

 

250

CY7C1470BV33-250AXC

51-85050

100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Pb-free

Commercial

 

 

 

 

 

 

 

CY7C1472BV33-250AXC

 

 

 

 

 

 

 

 

 

 

CY7C1470BV33-250BZC

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

 

CY7C1472BV33-250BZC

 

 

 

 

 

 

 

 

 

 

CY7C1470BV33-250BZXC

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Pb-free

 

 

 

 

 

 

 

 

CY7C1472BV33-250BZXC

 

 

 

 

 

 

 

 

 

 

 

CY7C1474BV33-250BGC

51-85167

209-ball Fine-Pitch Ball Grid Array (14 × 22

× 1.76 mm)

 

 

 

 

 

 

 

 

CY7C1474BV33-250BGXC

 

209-ball Fine-Pitch Ball Grid Array (14 × 22

× 1.76 mm) Pb-free

 

 

 

 

 

 

 

CY7C1470BV33-250AXI

51-85050

100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Pb-free

Industrial

 

 

 

 

 

 

 

CY7C1472BV33-250AXI

 

 

 

 

 

 

 

 

 

 

CY7C1470BV33-250BZI

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

 

CY7C1472BV33-250BZI

 

 

 

 

 

 

 

 

 

 

CY7C1470BV33-250BZXI

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Pb-free

 

 

 

 

 

 

 

 

CY7C1472BV33-250BZXI

 

 

 

 

 

 

 

 

 

 

 

CY7C1474BV33-250BGI

51-85167

209-ball Fine-Pitch Ball Grid Array (14 × 22

× 1.76 mm)

 

 

 

 

 

 

 

 

CY7C1474BV33-250BGXI

 

209-ball Fine-Pitch Ball Grid Array (14 × 22

× 1.76 mm) Pb-free

 

 

 

 

 

 

 

Document #: 001-15031 Rev. *C

Page 26 of 30

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Contents Description 250 MHz 200 MHz 167 MHz Unit Functional DescriptionSelection Guide Cypress Semiconductor Corporation 198 Champion CourtLogic Block Diagram CY7C1470BV33 2M x Logic Block Diagram CY7C1472BV33 4M xLogic Block Diagram CY7C1474BV33 1M x ADV/LDPin Configurations Pin Tqfp PinoutTDI TDO CENNC/1G CE2 CLK ModeBall Fbga 14 x 22 x 1.76 mm Pinout CY7C1474BV33 1M × Pin Definitions Pin Name IO Type Pin Description Byte Write Select Inputs, Active LOW. Qualified withFunctional Overview ZZ Mode Electrical Characteristics Parameter Description Test Conditions Min Max UnitTruth Table Operation Address UsedFunction CY7C1472BV33 Partial Write Cycle DescriptionFunction CY7C1470BV33 BW d BW c BW b BW a Function CY7C1474BV33TAP Controller State Diagram Ieee 1149.1 Serial Boundary Scan JtagTAP Instruction Set TAP Timing Output Times TAP AC Switching CharacteristicsParameter Description Min Max Unit Clock Hold Times5V TAP AC Test Conditions TAP DC Electrical Characteristics And Operating Conditions3V TAP AC Test Conditions GND VIN VddqScan Register Sizes Register Name Bit Size Identification Codes Instruction DescriptionBoundary Scan Exit Order 2M x Bit # Ball ID Boundary Scan Exit Order 4M x Bit # Ball IDE10 Boundary Scan Exit Order 1M xBit # Ball ID V10Operating Range Electrical CharacteristicsMaximum Ratings Range AmbientAC Test Loads and Waveforms CapacitanceThermal Resistance Parameter Description 250 200 167 Unit Min Max Switching CharacteristicsSetup Times Data Switching WaveformsADV/LD Address A3 A4NOP, Stall and Deselect Cycles Ordering Information 250 Package Diagrams Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mmBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm VKN/AESA ECN No Issue Date Orig. Description of ChangeVKN/KKVTMP VKN