Cypress CY7C1474BV33 TAP AC Switching Characteristics, Parameter Description Min Max Unit Clock

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CY7C1470BV33

CY7C1472BV33, CY7C1474BV33

TAP AC Switching Characteristics

Over the Operating Range[9, 10]

Parameter	Description	Min	Max	Unit
Clock

tTCYC	TCK Clock Cycle Time	50		ns
tTF	TCK Clock Frequency		20	MHz
tTH	TCK Clock HIGH time	20		ns
tTL	TCK Clock LOW time	20		ns
Output Times

tTDOV	TCK Clock LOW to TDO Valid		10	ns
tTDOX	TCK Clock LOW to TDO Invalid	0		ns
Setup Times

tTMSS	TMS Setup to TCK Clock Rise	5		ns
tTDIS	TDI Setup to TCK Clock Rise	5		ns
tCS	Capture Setup to TCK Rise	5		ns
Hold Times

tTMSH	TMS Hold after TCK Clock Rise	5		ns
tTDIH	TDI Hold after Clock Rise	5		ns
tCH	Capture Hold after Clock Rise	5		ns

Notes

9.tCS and tCH refer to the setup and hold time requirements of latching data from the boundary scan register.

10.Test conditions are specified using the load in TAP AC Test Conditions. tR/tF = 1 ns.

Document #: 001-15031 Rev. *C

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Contents Cypress Semiconductor Corporation 198 Champion Court Functional DescriptionSelection Guide Description 250 MHz 200 MHz 167 MHz UnitLogic Block Diagram CY7C1472BV33 4M x Logic Block Diagram CY7C1470BV33 2M xADV/LD Logic Block Diagram CY7C1474BV33 1M xPin Tqfp Pinout Pin ConfigurationsMode CENNC/1G CE2 CLK TDI TDOBall Fbga 14 x 22 x 1.76 mm Pinout CY7C1474BV33 1M × Byte Write Select Inputs, Active LOW. Qualified with Pin Definitions Pin Name IO Type Pin DescriptionFunctional Overview Parameter Description Test Conditions Min Max Unit ZZ Mode Electrical CharacteristicsOperation Address Used Truth TableFunction CY7C1474BV33 Partial Write Cycle DescriptionFunction CY7C1470BV33 BW d BW c BW b BW a Function CY7C1472BV33Ieee 1149.1 Serial Boundary Scan Jtag TAP Controller State DiagramTAP Instruction Set TAP Timing Hold Times TAP AC Switching CharacteristicsParameter Description Min Max Unit Clock Output TimesGND VIN Vddq TAP DC Electrical Characteristics And Operating Conditions3V TAP AC Test Conditions 5V TAP AC Test ConditionsIdentification Codes Instruction Description Scan Register Sizes Register Name Bit SizeBoundary Scan Exit Order 4M x Bit # Ball ID Boundary Scan Exit Order 2M x Bit # Ball IDV10 Boundary Scan Exit Order 1M xBit # Ball ID E10Range Ambient Electrical CharacteristicsMaximum Ratings Operating RangeCapacitance Thermal ResistanceAC Test Loads and Waveforms Switching Characteristics Setup TimesParameter Description 250 200 167 Unit Min Max A3 A4 Switching WaveformsADV/LD Address DataNOP, Stall and Deselect Cycles Ordering Information 250 Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm VKN ECN No Issue Date Orig. Description of ChangeVKN/KKVTMP VKN/AESA