Cypress CY7C1471BV33, CY7C1475BV33, CY7C1473BV33 manual Ordering Information

Page 28

CY7C1471BV33

CY7C1473BV33, CY7C1475BV33

Ordering Information

Not all of the speed, package, and temperature ranges mentioned here are available. Please contact your local sales representative or visit www.cypress.com for actual products offered.

Speed

Ordering Code

Package

Part and Package Type

Operating

(MHz)

Diagram

Range

 

 

133

CY7C1471BV33-133AXC

51-85050

100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Pb-Free

Commercial

 

 

 

 

 

 

CY7C1473BV33-133AXC

 

 

 

 

 

 

 

 

 

CY7C1471BV33-133BZC

51-85165

165-Ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

CY7C1473BV33-133BZC

 

 

 

 

 

 

 

 

 

CY7C1471BV33-133BZXC

51-85165

165-Ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Pb-Free

 

 

 

 

 

 

 

CY7C1473BV33-133BZXC

 

 

 

 

 

 

 

 

 

CY7C1475BV33-133BGC

51-85167

209-Ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm)

 

 

 

 

 

 

 

CY7C1475BV33-133BGXC

 

209-Ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm) Pb-Free

 

 

 

 

 

 

 

CY7C1471BV33-133AXI

51-85050

100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Pb-Free

lndustrial

 

 

 

 

 

 

CY7C1473BV33-133AXI

 

 

 

 

 

 

 

 

 

CY7C1471BV33-133BZI

51-85165

165-Ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

CY7C1473BV33-133BZI

 

 

 

 

 

 

 

 

 

CY7C1471BV33-133BZXI

51-85165

165-Ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Pb-Free

 

 

 

 

 

 

 

CY7C1473BV33-133BZXI

 

 

 

 

 

 

 

 

 

CY7C1475BV33-133BGI

51-85167

209-Ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm)

 

 

 

 

 

 

 

CY7C1475BV33-133BGXI

 

209-Ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm) Pb-Free

 

 

 

 

 

 

117

CY7C1471BV33-117AXC

51-85050

100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Pb-Free

Commercial

 

 

 

 

 

 

CY7C1473BV33-117AXC

 

 

 

 

 

 

 

 

 

CY7C1471BV33-117BZC

51-85165

165-Ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

CY7C1473BV33-117BZC

 

 

 

 

 

 

 

 

 

CY7C1471BV33-117BZXC

51-85165

165-Ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Pb-Free

 

 

 

 

 

 

 

CY7C1473BV33-117BZXC

 

 

 

 

 

 

 

 

 

CY7C1475BV33-117BGC

51-85167

209-Ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm)

 

 

 

 

 

 

 

CY7C1475BV33-117BGXC

 

209-Ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm) Pb-Free

 

 

 

 

 

 

 

CY7C1471BV33-117AXI

51-85050

100-pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Pb-Free

lndustrial

 

 

 

 

 

 

CY7C1473BV33-117AXI

 

 

 

 

 

 

 

 

 

CY7C1471BV33-117BZI

51-85165

165-Ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

CY7C1473BV33-117BZI

 

 

 

 

 

 

 

 

 

CY7C1471BV33-117BZXI

51-85165

165-Ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Pb-Free

 

 

 

 

 

 

 

CY7C1473BV33-117BZXI

 

 

 

 

 

 

 

 

 

CY7C1475BV33-117BGI

51-85167

209-Ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm)

 

 

 

 

 

 

 

CY7C1475BV33-117BGXI

 

209-Ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm) Pb-Free

 

 

 

 

 

 

Document #: 001-15029 Rev. *B

Page 28 of 32

[+] Feedback

Image 28
Contents Features Selection Guide Functional DescriptionDescription 133 MHz 117 MHz Unit Cypress Semiconductor Corporation 198 Champion CourtLogic Block Diagram CY7C1471BV33 2M x Logic Block Diagram CY7C1473BV33 4M xLogic Block Diagram CY7C1475BV33 1M x Pin Configuration CY7C1471BV33CY7C1473BV33 Ball Fbga 15 x 17 x 1.4 mm Pinout CY7C1471BV33 2M x CY7C1473BV33 4M xBall Fbga 14 x 22 x 1.76 mm Pinout CY7C1475BV33 1M × NC/1GPin Definitions Burst Read Accesses Single Read AccessesFunctional Overview Interleaved Burst Address Table ZZ Mode Electrical CharacteristicsLinear Burst Address Table Address Operation Truth TableUsed Read/write truth table for CY7C1471BV33 follows.1, 2 Truth Table for Read/WriteFunction Disabling the Jtag Feature Test Access Port TAPPerforming a TAP Reset Ieee 1149.1 Serial Boundary Scan JtagTAP Instruction Set OverviewTAP Controller State Diagram TEST-LOGIC Reset RUN-TEST IdleTAP Controller Block Diagram CircuitryTAP DC Electrical Characteristics and Operating Conditions 3V TAP AC Test Conditions5V TAP AC Test Conditions GND VIN VddqTAP AC Switching Characteristics TAP TimingIdentification Register Definitions Scan Register SizesIdentification Codes Register Name Bit SizeBoundary Scan Exit Order 4M x Boundary Scan Exit Order 2M xBit # Ball ID Boundary Scan Exit Order 1M x Electrical Characteristics Maximum RatingsOperating Range Range AmbientCapacitance Thermal ResistanceParameter Description Test Conditions Tqfp Fbga Unit Max 5V IO Test LoadParameter Description 133 MHz 117 MHz Unit Min Switching CharacteristicsMin Max Rite ReadSwitching Waveforms BW ADAddress StallZZ Mode Timing Ordering Information Package Diagrams Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mmBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Issue Orig. of Change Description of Change Date Document HistoryVKN/KKVTMP VKN/AESA