Cypress CY7C1473BV33, CY7C1475BV33, CY7C1471BV33 manual

Page 5

CY7C1471BV33

CY7C1473BV33, CY7C1475BV33

Pin Configuration (continued)

Figure 2. 100-Pin TQFP Pinout

BYTE B

VDDQ

VSS

NC NC

DQB

VSS VDDQ

DQB DQB

VDD

VSS

DQB

VDDQ

VSS

DQB DQB

DQPB

VSS VDDQ

A		A		CE	CE		NC		NC	BW	BW		CE	V		V		CLK		WE	CEN	OE		ADV/LD		A		A		A	A
A		A		CE	CE		NC		NC	BW	BW		CE	V		V		CLK		WE	CEN	OE		ADV/LD		A		A		A	A
				1	2					B	A	3			DD		SS
															DD		SS



100		99		98	97		96		95	94	93	92		91		90		89		88	87	86	85			84		83		82	81
1																															80
2																															79
3																															78
4																															77
5																															76
6																															75
7																															74
8																															73
9																															72
10																															71
11																															70
12																															69
13												CY7C1473BV33																			68
14												CY7C1473BV33																			67
14																															67
15																															66
16																															65
17																															64
18																															63
19																															62
20																															61
21																															60
22																															59
23																															58
24																															57
25																															56
26																															55
27																															54
28																															53
29																															52
30																															51
31		32		33	34		35		36	37	38	39		40		41		42		43	44	45	46			47		48		49	50


	MODE		A	A		A		A	A1	A0	NC/288M		NC/144M		V		V		A	A	A	A			A		A		A	A		A
															SS		DD

VDDQ

VSS

NC DQPA

DQA DQA

VSS

VDDQ

DQA DQA

VSS

VDD

DQA DQA

VDDQ

VSS

DQA DQA NC

VSS

VDDQ

BYTE A

Document #: 001-15029 Rev. *B

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Contents Selection Guide Functional Description FeaturesDescription 133 MHz 117 MHz Unit Cypress Semiconductor Corporation 198 Champion Court Logic Block Diagram CY7C1473BV33 4M x Logic Block Diagram CY7C1471BV33 2M xLogic Block Diagram CY7C1475BV33 1M x CY7C1471BV33 Pin ConfigurationCY7C1473BV33 CY7C1473BV33 4M x Ball Fbga 15 x 17 x 1.4 mm Pinout CY7C1471BV33 2M xNC/1G Ball Fbga 14 x 22 x 1.76 mm Pinout CY7C1475BV33 1M ×Pin Definitions Functional Overview Single Read AccessesBurst Read Accesses Linear Burst Address Table ZZ Mode Electrical CharacteristicsInterleaved Burst Address Table Used Truth TableAddress Operation Function Truth Table for Read/WriteRead/write truth table for CY7C1471BV33 follows.1, 2 Test Access Port TAP Disabling the Jtag FeaturePerforming a TAP Reset Ieee 1149.1 Serial Boundary Scan JtagOverview TAP Instruction SetTEST-LOGIC Reset RUN-TEST Idle TAP Controller State DiagramCircuitry TAP Controller Block Diagram3V TAP AC Test Conditions TAP DC Electrical Characteristics and Operating Conditions5V TAP AC Test Conditions GND VIN VddqTAP Timing TAP AC Switching CharacteristicsScan Register Sizes Identification Register DefinitionsIdentification Codes Register Name Bit SizeBit # Ball ID Boundary Scan Exit Order 2M xBoundary Scan Exit Order 4M x Boundary Scan Exit Order 1M x Maximum Ratings Electrical CharacteristicsOperating Range Range AmbientThermal Resistance CapacitanceParameter Description Test Conditions Tqfp Fbga Unit Max 5V IO Test LoadMin Max Switching CharacteristicsParameter Description 133 MHz 117 MHz Unit Min Read RiteBW AD Switching WaveformsAddress StallZZ Mode Timing Ordering Information Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Document History Issue Orig. of Change Description of Change DateVKN/KKVTMP VKN/AESA