Cypress CY7C1473BV33 manual 3V TAP AC Test Conditions, 5V TAP AC Test Conditions, GND VIN Vddq

Page 17

CY7C1471BV33 CY7C1473BV33, CY7C1475BV33

3.3V TAP AC Test Conditions

Input pulse levels

VSS to 3.3V

Input rise and fall times

1 ns

Input timing reference levels

1.5V

Output reference levels

1.5V

Test load termination supply voltage

1.5V

2.5V TAP AC Test Conditions

Input pulse levels

VSS to 2.5V

Input rise and fall time

1 ns

Input timing reference levels

1.25V

Output reference levels

1.25V

Test load termination supply voltage

1.25V

3.3V TAP AC Output Load Equivalent

2.5V TAP AC Output Load Equivalent

 

 

 

 

 

 

 

1.5V

 

 

 

 

 

 

1.25V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

50Ω

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ZO= 50Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20pF

 

 

 

ZO= 50Ω

 

 

 

 

 

 

 

 

 

20pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TAP DC Electrical Characteristics and Operating Conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(0°C < T < +70°C; V

DD

= 3.3V ±0.165V unless otherwise noted)[9]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

 

Description

 

 

 

Test Conditions

Min

 

 

 

 

 

Max

 

Unit

VOH1

Output HIGH Voltage

 

IOH = –4.0 mA, VDDQ = 3.3V

2.4

 

 

 

 

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

IOH = –1.0 mA, VDDQ = 2.5V

2.0

 

 

 

 

 

 

 

 

 

 

 

V

VOH2

Output HIGH Voltage

 

IOH = –100 µA

VDDQ = 3.3V

2.9

 

 

 

 

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

2.1

 

 

 

 

 

 

 

 

 

 

 

V

VOL1

Output LOW Voltage

 

IOL = 8.0 mA

VDDQ = 3.3V

 

 

 

0.4

 

V

 

 

 

 

 

 

 

 

 

 

 

IOL = 1.0 mA

VDDQ = 2.5V

 

 

 

0.4

 

V

VOL2

Output LOW Voltage

 

IOL = 100 µA

VDDQ = 3.3V

 

 

 

0.2

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

 

 

 

0.2

 

V

VIH

Input HIGH Voltage

 

 

 

 

VDDQ = 3.3V

2.0

 

 

VDD + 0.3

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

1.7

 

 

VDD + 0.3

 

V

VIL

Input LOW Voltage

 

 

 

 

VDDQ = 3.3V

–0.3

 

 

0.8

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

–0.3

 

 

0.7

 

V

IX

Input Load Current

 

GND < VIN < VDDQ

 

 

 

–5

 

5

 

µA

Note

9. All voltages refer to VSS (GND).

Document #: 001-15029 Rev. *B

Page 17 of 32

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Contents Selection Guide Functional Description FeaturesDescription 133 MHz 117 MHz Unit Cypress Semiconductor Corporation 198 Champion CourtLogic Block Diagram CY7C1473BV33 4M x Logic Block Diagram CY7C1471BV33 2M xLogic Block Diagram CY7C1475BV33 1M x CY7C1471BV33 Pin ConfigurationCY7C1473BV33 CY7C1473BV33 4M x Ball Fbga 15 x 17 x 1.4 mm Pinout CY7C1471BV33 2M xNC/1G Ball Fbga 14 x 22 x 1.76 mm Pinout CY7C1475BV33 1M ×Pin Definitions Functional Overview Single Read AccessesBurst Read Accesses Linear Burst Address Table ZZ Mode Electrical CharacteristicsInterleaved Burst Address Table Used Truth TableAddress Operation Function Truth Table for Read/WriteRead/write truth table for CY7C1471BV33 follows.1, 2 Test Access Port TAP Disabling the Jtag FeaturePerforming a TAP Reset Ieee 1149.1 Serial Boundary Scan JtagOverview TAP Instruction SetTEST-LOGIC Reset RUN-TEST Idle TAP Controller State DiagramCircuitry TAP Controller Block Diagram3V TAP AC Test Conditions TAP DC Electrical Characteristics and Operating Conditions5V TAP AC Test Conditions GND VIN VddqTAP Timing TAP AC Switching CharacteristicsScan Register Sizes Identification Register DefinitionsIdentification Codes Register Name Bit SizeBit # Ball ID Boundary Scan Exit Order 2M xBoundary Scan Exit Order 4M x Boundary Scan Exit Order 1M x Maximum Ratings Electrical CharacteristicsOperating Range Range AmbientThermal Resistance CapacitanceParameter Description Test Conditions Tqfp Fbga Unit Max 5V IO Test LoadMin Max Switching CharacteristicsParameter Description 133 MHz 117 MHz Unit Min Read RiteBW AD Switching WaveformsAddress StallZZ Mode Timing Ordering Information Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Document History Issue Orig. of Change Description of Change DateVKN/KKVTMP VKN/AESA