Cypress CY7C1473BV33 manual Package Diagrams, Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm

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CY7C1471BV33

CY7C1473BV33, CY7C1475BV33

Package Diagrams

Figure 8. 100-Pin Thin Plastic Quad Flatpack (14 x 20 x 1.4 mm)

16.00±0.20

14.00±0.10

100

81

1

22.00±0.20

20.00±0.10

30

31

50

80

0.30±0.08

0.65

TYP.

51

12° ±1° (8X)

1.40±0.05

SEE DETAIL

A

0.20 MAX.

1.60 MAX.

R 0.08 MIN. 0.20 MAX.

0.25

0° MIN.

STAND-OFF 0.05 MIN. 0.15 MAX.

SEATING PLANE

NOTE:

0.10

GAUGE PLANE

-7°

0.60±0.15

1.00 REF.

R 0.08 MIN. 0.20 MAX.

0.20 MIN.

DETAIL A

1.JEDEC STD REF MS-026

2.BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PER SIDE BODY LENGTH DIMENSIONS ARE MAX PLASTIC BODY SIZE INCLUDING MOLD MISMATCH

3.DIMENSIONS IN MILLIMETERS

51-85050 *B

Document #: 001-15029 Rev. *B

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Contents Selection Guide Functional Description FeaturesDescription 133 MHz 117 MHz Unit Cypress Semiconductor Corporation 198 Champion CourtLogic Block Diagram CY7C1473BV33 4M x Logic Block Diagram CY7C1471BV33 2M xLogic Block Diagram CY7C1475BV33 1M x CY7C1471BV33 Pin ConfigurationCY7C1473BV33 CY7C1473BV33 4M x Ball Fbga 15 x 17 x 1.4 mm Pinout CY7C1471BV33 2M xNC/1G Ball Fbga 14 x 22 x 1.76 mm Pinout CY7C1475BV33 1M ×Pin Definitions Functional Overview Single Read AccessesBurst Read Accesses Linear Burst Address Table ZZ Mode Electrical CharacteristicsInterleaved Burst Address Table Used Truth TableAddress Operation Function Truth Table for Read/WriteRead/write truth table for CY7C1471BV33 follows.1, 2 Test Access Port TAP Disabling the Jtag FeaturePerforming a TAP Reset Ieee 1149.1 Serial Boundary Scan JtagOverview TAP Instruction SetTEST-LOGIC Reset RUN-TEST Idle TAP Controller State DiagramCircuitry TAP Controller Block Diagram3V TAP AC Test Conditions TAP DC Electrical Characteristics and Operating Conditions5V TAP AC Test Conditions GND VIN VddqTAP Timing TAP AC Switching CharacteristicsScan Register Sizes Identification Register DefinitionsIdentification Codes Register Name Bit SizeBit # Ball ID Boundary Scan Exit Order 2M xBoundary Scan Exit Order 4M x Boundary Scan Exit Order 1M x Maximum Ratings Electrical CharacteristicsOperating Range Range AmbientThermal Resistance CapacitanceParameter Description Test Conditions Tqfp Fbga Unit Max 5V IO Test LoadMin Max Switching CharacteristicsParameter Description 133 MHz 117 MHz Unit Min Read RiteBW AD Switching WaveformsAddress StallZZ Mode Timing Ordering Information Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Document History Issue Orig. of Change Description of Change DateVKN/KKVTMP VKN/AESA