Delta Tau 5xx-603869-xUxx manual Parameters to Set Up Per-Channel Hardware Signals

Brick Motion Controller Hardware Reference Manual

hardware clock signals are SCLK (encoder sample clock), PFM_CLK (pulse frequency modulator clock), DAC_CLK (digital-to-analog converter clock), and ADC_CLK (analog-to-digital converter clock).

Parameters to Set Up Per-Channel Hardware Signals

I70n6 is the output mode; “n” is the output channel number (i.e. for channel 1 the variable to set would be I7016, I7026 for channel 2 etc.). On Pmac1 there is only one output and one output mode, DAC output. On PMAC2 boards, each channel has 3 outputs, and there are 4 output modes. Since this is board was designed to output filtered PWM signals we want to configure at least the first output as PWM. Therefore the default value of 0 is the choice. For information on this variable, consult the Turbo Software Reference Manual.

Ixx69 is the motor output command limit. The analog outputs on PMAC1 style boards and some PMAC2 accessories are 16-bit or 18-bit DACs, which map a numerical range of -32,768 to +32,767 into a voltage range of -10V to +10V relative to analog ground (AGND). For our purposes of a filtered PWM output this value still represents the maximum voltage output; however the ratio is slightly different. With a true DAC, Ixx69=32767 allows a maximum voltage of 10V output. With the filtered PWM circuit, Ixx69 is a function of I7000. A 10V signal in the output register is no longer 32767 as was in PMAC1, a 10V signal is corresponds to a value equal to I7000. Anything over I7000 will just rail the DAC at 10V. For example:

Desired Maximum Output Value = 6V

Ixx69 = 6/10 * I7000

Desired Maximum Output Value = 10V

Ixx69= I7000 + 10 ; add a little headroom to assure a full 10V

28 System Wiring