12-54
Module I/O Specifications
A17, A26 Step Loop
Outputs
See "A25 Sum Loop", page 12-50, for measurement procedure.
Step Loop B(A17) To achieve lowest frequency from available range (to compensate for
digitaloscilloscope frequency range to measure higher RF frequencies), select 380.8 MHz
from RF analyzer page (This uses 495.1 MHz from step loop and 114.3 MHz IF).
StepLoop A(A26) Levels same as Step Loop B, except for set frequency on RF Generator
page. To obtain lowest frequency at step loop A, output set to 249.1 MHz.
From A33 Hop Controller
Hop Control J2(5,8,9)
Levels: TTL
Clock Rate: 1 MHz (bursted)
Levels
Pin 5
Pin 8
Pin 9
5 Vdc
-1.25 Vdc
0 Vdc
To A25 Sum Loop Assembly
SUM_LP_PTUNE J2(7)
Level: -12 Vdc to +12 Vdc
To A25 Sum Loop (A26 Step Loop A), To A11 Receiver Mixer (A17 Step Loop B)
STEP_LP_OUT J1(3)
Frequency: 486 - 1015 MHz
Resolution: 100 kHz
Level: 3 dB± 3 dB
Harmonics: < -20 dBc
Spurs (>5 kHz offsets): < -60 dBc
Waveshape sine
Levels 350 Vrms
1 Vp-p