Parameter Min Max Unit Memory Read | Analog Devices ADSP-2186

ADSP-2186

TIMING PARAMETERS

Parameter

Min

Max

Unit

Memory Read

Timing Requirements:

tRDD

RD

Low to Data Valid

0.5 tCK – 9 + w

ns

tAA

A0–A13, xMS to Data Valid

0.75 tCK – 10.5 + w

ns

tRDH

Data Hold from

RD

High

0

ns

Switching Characteristics:

tRP

RD Pulse Width

0.5 tCK – 5 + w

ns

tCRD

CLKOUT High to

RD

Low

0.25 tCK – 5

0.25 tCK + 7

ns

tASR

A0–A13,

xMS

Setup before

RD

Low

0.25 tCK – 6

ns

tRDA

A0–A13, xMS Hold after RD Deasserted

0.25 tCK – 3

ns

tRWR

RD

High to

RD

or

WR

Low

0.5 tCK – 5

ns

w = wait states × tCK.

xMS = PMS, DMS, CMS, IOMS, BMS.

CLKOUT

A0 – A13

DMS, PMS,

BMS, IOMS,

CMS

RD

tASR

tRP

tCRD

D

tRDD

tAA

WR

tRDA

tRWR

tRDH

Figure 17. Memory Read

–20–

REV. 0

Image 20

Analog Devices ADSP-2186 specifications Parameter Min Max Unit Memory Read

Contents

General Description Functional Block DiagramGeneral Note Architecture Overview Development SystemAdditional Information Serial Ports PIN Descriptions Input Pin Name Pins Output Function Common-Mode PinsMemory Interface Pins Setting Memory Mode LOW Power Operation Power-DownSource Of Interrupt Interrupt Vector Address Hex Interrupts Idle n IdleSlow Idle System Interface Clock Signals ResetMemory Architecture Program Memory Space Full Memory Mode Memory A13 A120Address Range Wait State Register Data Memory Byte Memory DMA BDMA, Full Memory Mode Internal Memory DMA Port Idma Port Host Memory ModeInternal Memory Space Word Size Alignment Booting Method MR Value Biased Unbiased Before RND RND Result Syntax IOaddr = dreg dreg = IOaddrBiased Rounding Designing AN EZ-ICE*-COMPATIBLE System Target Board Connector for EZ-ICE* Probe Target System Interface SignalsTarget Memory Interface PM, DM, BM, IOM, & CM Grade Parameter Min Max Unit Grades Parameter Test Conditions Min Typ Max Unit WR Low Total Power Dissipation = Pint + C × VDD2 × f Power DissipationPackage Assumptions Output Disable Time Output Enable TimeCapacitive Loading Test Conditions Parameter Min Max Clock Signals and Reset Control Signals IRQx FI, or PFx Setup before Clkout Low1, 2, 3 TCK + Flag Output Delay from Clkout Low5 TCK +Parameter Min Max Unit Interrupts and Flag Flag Output Hold after Clkout Low5 25 tCK Parameter Min Max Unit Bus Request/Grant Parameter Min Max Unit Memory Read Parameter Min Max Unit Memory Write Parameter Min Max Unit Serial Ports Parameter Min Max Unit Idma Address Latch IAD15-0 Data Setup before End of Write2, 3 Parameter Min Max Idma Write, Short Write CycleIack Low before Start of Write1 Duration of Write1 IAD15-0 Data Setup before Parameter Min Max Unit Idma Write, Long Write CycleLow before Start of Write1 Low4 TCK Parameter Min Max Unit Idma Read, Long Read Cycle High after Start of Read1 Duration of Read Switching CharacteristicsParameter Min Max Unit Idma Read, Short Read Cycle Lead Tqfp Package Pinout ADSP-2186 Pin Number Name A4/IAD3A5/IAD4 A6/IAD5 ST-100 Outline DimensionsOrdering Guide Page C2999-6-3/97