CY7C68033/CY7C68034
EZ-USB NX2LP-Flex™ Flexible USB NAND Flash Controller
CY7C68033/CY7C68034 Silicon Features
•Certified compliant for Bus- or
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•Ultra low power – 43 mA typical current draw in any mode
•Enhanced 8051 core
—Firmware runs from internal RAM, which is downloaded from NAND flash at startup
—No external EEPROM required
•15 KBytes of
—Default NAND firmware ~8 kB
—Default free space ~7 kB
•Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints
—Buffering options: double, triple, and quad
•Additional programmable (BULK/INTERRUPT)
•SmartMedia Standard Hardware ECC generation with
•GPIF (General Programmable Interface)
—Allows direct connection to most parallel interfaces
—Programmable waveform descriptors and configuration registers to define waveforms
—Supports multiple Ready (RDY) inputs and Control (CTL) outputs
•12
•Integrated,
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—Four clocks per instruction cycle
—Three counter/timers
—Expanded interrupt system
—Two data pointers
•3.3V operation with 5V tolerant inputs
•Vectored USB interrupts and GPIF/FIFO interrupts
•Separate data buffers for the
•Integrated I2C™ controller, runs at 100 or 400 kHz
•Four integrated FIFOs
—Integrated glue logic and FIFOs lower system cost
—Automatic conversion to and from
—Master or slave operation
—Uses external clock or asynchronous strobes
—Easy interface to ASIC and DSP ICs
•Available in space saving,
CY7C68034 Only Silicon Features:
•Ideal for battery powered applications
— Suspend current: 100 μA (typ.)
CY7C68033 Only Silicon Features:
•Ideal for
— Suspend current: 300 μA (typ.)
Block Diagram
24MHz Ext. Xtal
enhanced 8051 core with low power options
Connected for
Integrated full- and
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| x20 | /0.5 | 8051 Core |
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| /1.0 |
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| PLL | 12/24/48 MHz, |
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| I2C |
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| four clocks/cycle |
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| Master |
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| VCC |
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| 1.5k |
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| Bus |
| Additional I/Os |
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| NAND |
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| (16)/Data |
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| Boot Logic |
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| GPIF |
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| Address |
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D+ | USB | CY | 15 kB |
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| RDY (2) | |
ECC |
| CTL (3) | |||||
D– | 2.0 |
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XCVR | Smart | RAM |
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| USB |
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| 1.1/2.0 |
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| Engine |
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| 4 kB | 8/16 |
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| FIFO |
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Enhanced USB core | ‘Soft Configuration’ enables | FIFO and USB endpoint memory |
simplifies 8051 code | easy firmware changes | (master or slave modes) |
General Programmable I/F to ASIC/DSP or bus standards such as
Up to 96 MB/s burst rate
Cypress Semiconductor Corporation | • 198 Champion Court • San Jose, CA | • | |
Document #: | Revised September 21, 2006 |
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