CY7C68033/CY7C68034
Document #: 001-04247 Rev. *D Page 8 of 33
Wakeup Pins
The 8051 puts itself and the rest of the chip into a power-down
mode by setting PCON.0 = 1. This stops the oscillator and
PLL. When WAKEUP is asserted by external logic, the oscil-
lator restarts, after the PLL stabilizes, and then the 8051
receives a wakeup interrupt. This applies whether or not
NX2LP-Flex is connected to the USB.
The NX2LP-Flex exits the power-down (USB suspend) state
using one of the following methods:
• USB bus activity (if D+/D– lines are left floating, noise on
these lines may indicate activity to the NX2LP-Flex and
initiate a wakeup).
• External logic asserts the WAKEUP pin
• External logic asserts the PA3/WU2 pin.
The second wakeup pin, WU2, can also be configured as a
general purpose I/O pin. This allows a simple external R-C
network to be used as a periodic wakeup source. Note that
WAKEUP is, by default, active LOW.
Program/Data RAM
Internal ROM/RAM Size
The NX2LP-Flex has 1 kBytes ROM and 15 kBytes of internal
program/data RAM, where PSEN#/RD# signals are internally
ORed to allow the 8051 to access it as both program and data
memory. No USB control registers appear in this space.
Internal Code Memory
This mode implements the internal block of RAM (starting at
0x0500) as combined code and data memory, as shown in
Figure6, be low.
Only the internal and scratch pad RAM spaces have the
following access:
• USB download (only supported by the Cypress Manufac-
turing Tool)
• Setup data pointer
• NAND boot access.
Figure 6. Internal Code Memory
Register Addresses
Figure 7. Internal Register Addresses
Table 5. Reset Timing Values
Condition TRESET
Power-on Reset with crystal 5 ms
Power-on Reset with external
clock source 200 μs + Clock stability time
Powered Reset 200 μs
*SUDPTR, USB download, NAND boot access
FFFF
E200
E1FF
E000
3FFF
0000
7.5 kBytes
USB registers
and 4 kBytes
FIFO buffers
(RD#, WR#)
512 Bytes RAM Data
(RD#, WR#)*
15 kBytes RAM
Code and Data
(PSEN#, RD#,
WR#)*
0500
1 kbyte ROM
FFFF
E800
E7BF
E740
E73F
E700
E6FF
E500
E4FF
E480
E47F
E400
E200
E1FF
E000
E3FF
EFFF
2 KBytes RESERVED
64 Bytes EP0 IN/OUT
64 Bytes RESERVED
8051 Addressable Registers
Reserved (128)
128 bytes GPIF Waveforms
512 bytes
8051 xdata RAM
F000
(512)
Reserved (512)
E780 64 Bytes EP1OUT
E77F
64 Bytes EP1IN
E7FF
E7C0
4 KBytes EP2-EP8
buffers
(8 x 512)
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