PCI 6254 (continued) features 3-1
internal arbiter control register 3-4
request/grant assignments 3-5,3-6
vendor/device ID 3-11PCI-to-PCI bridge overview 1-1 PERR signal, PCI 3-13
PLD JTAG header 2-9
PMC
bus control signals 3-12 connector pin assignments
3-14
device mapping 3-2 module installation 3-1 module overview 1-1 slot available power 3-1
PMC interrupt signals, PCI 3-13 PME signal, PCI 3-13
R
references, manuals, and data books 1-4
registers
internal arbiter control 3-4 PCI6254 non-transparent mode
3-8
PCI6254 transparent mode 3-6 regulatory certifications 1-3 relative humidity 2-10
REQ signal, PCI 3-13reset
diagram and methods 2-11 signal, PCI 3-13
switch 1-1,2-6 returning boards 2-13 RoHS 1-3
ROM interface, PCI 3-6
S
serial number ocation 2-4 SERR signal, PCI 3-13 service information 2-13 setup requirements 2-7
shock and vibration testing 2-10specifications
environmental 2-10
mechanical 2-1 static control 2-1 stop signal, PCI 3-13 storage temperature 2-10 switch, reset 1-1,2-6 switching regulator 1-1
T
table of contents ii-iii tables, list of iv-vii TDI signal, PCI 3-13 TDO signal, PCI 3-13 technical references 1-4 technical support 2-13 terminology 1-4 timing, PMC 3-3
TMS signal, PCI 3-13 TRDY signal, PCI 3-14 troubleshooting, general 2-13 TRST signal, PCI 3-14
U
UL certifications 1-3