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Emerson CC1000DM user manual Timing Interrupts, PMC Module Installation

Models: CC1000DM

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Timing

Interrupts

Table 3-3:

PMCx Interrupt Mapping

	P M C / P C I I N T E R F A C E	.
	P M C / P C I I N T E R F A C E	.
	PMC Module Installation	.
	PMC Module Installation	.
		.
		. .

The module interface transfers data between the PCI and local memory at burst data rates. When two modules are installed, they both contend for ownership of a common bus, which may reduce the individual performance of each module. Specific transfer rates to the PCI bus are dependent on the module design.

Many PMC modules also incorporate a bridge chip between their PCI and local busses, essentially creating two bridges that must be crossed to complete a cycle. Often, the second bridge is a source of long delays due to the associated bus acquisition latency. Initialization and time-out values should be set up to accommodate any additional latency.

External interrupts that are controlled by the CC1000dm carrier card are routed to the on-board devices/slots as follows:

	PMC1/ PMC2	PMC1
Base PCI	(Transparent, non-transparent, no	(Legacy mode only)
Interrupt	system controller modes)	Non-System Controller
Assignment (secondary):	System Controller PCI Interrupt Line:	PCI Interrupt Line:

INTA		INTA	(J21, pin 4)	INTC	(J11, pin 6)

INTB		INTB	(J21, pin 5)	INTD	(J11, pin 9)

INTC	PLX PCI 6254 (HB6)	INTC	(J21, pin 6)	INTA	(J11, pin 4)

INTD		INTD	(J21, pin 9)	INTB	(J11, pin 5)

Table 3-4:

cPCI Interrupt Mapping

Base cPCI Interrupt			Transparent Mode
Assignment:			(secondary):		Non-Transparent or Legacy Mode:
INTA	(J1, pin A3)		INTA		INTA (PCI 6254 primary side)
INTA	(J1, pin A3)		INTA		INTA (PCI 6254 primary side)

INTB	(J1, pin B3)		INTB		–

INTC	(J1, pin C3)		INTC		–

INTD	(J1, pin E3)		INTD		–

Arbitration The CC1000dm arbitration control for the on-board PCI devices is provided by the PLX PCI 6254 PCI-to-PCI bridge. The PCI 6254 arbitrates for use of the primary bus when initiating upstream transactions and for use of the secondary bus when forwarding downstream transactions. The primary bus arbiter is external to the PCI 6254, and the secondary bus is an internal arbiter on the PCI 6254.

10004281-02

CC1000dm User’s Manual 3-3

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Emerson CC1000DM user manual Timing Interrupts, PMC Module Installation

Contents

Dual Mode PMC cPCI Carrier Card User’s Manual CC1000dmThe information in this manual has been checked and is believed to be REGULATORY AGENCY WARNINGS & NOTICES According to EN Manufacturer’s Name Artesyn Technologies R e g u l a t o r yIssue date May EC Declaration of ConformityCC1000dm Setup CONTENTS2 Setup Components and Features Functional Overview Additional InformationC o n t e n t s Technical Support Service InformationPCI Bridge Features PMC Module Installation Features Data Buffers Arbitration and Device SelectionPLD Signal Routing-All Modes FIGURESGeneral System Block Diagram Basic Reset Diagram10004281-02 F i g u r e svi CC1000dm User’s Manual 3-11 TABLES2-10 2-1010004281-02 Ta b l e sviii CC1000dm User’s Manual Internal Arbiter Control Register PCI6254 Configuration Registers-Transparent ModePCI6254 Configuration Registers-Non-Transparent Mode REGISTERS10004281-02 R e g i s t e r s2 CC1000dm User’s Manual OVERVIEW C.O. M. .P. O. .N. E. .N. T. S. . A. .N. D. . .F.E.A. T. .U.R. E. .SFunctional Overview F.U.N. .C.T.I.O. N. .A. L. . O. .V.E. R. .V.I.E.WA.D. D. .I T. .I O. .N. A. .L. .I .N.F. O. .R.M. .A. T. .I O. .N Additional Information Product CertificationRoHS Compliance Additional Information Terminology and NotationTechnical References Document Additional InformationO V E R V I E W Additional InformationC.C.1. 0. .0.0. D. .M. . .C.I.R.C. U. .I T. . B. .O. A. .R.D SETUPE.L.E.C. .T.R.O. S. .T.A. T. I. C. . D. .I .S.C.H. .A.R. G. .E 2-2 CC1000dm User’s Manual CC1000dm Circuit BoardS E T U P Component Map, Top revS E T U P CC1000dm Circuit BoardComponent Map, Bottom rev 10004281-02CC1000dm Circuit Board Identification Numbers ConnectorsCC1000dm Circuit Board Fuses and JumpersPMC2 PMC1 9 JP2 1 PMC2 JTAG Header 10 2 PMC1 JTAG Header CC1000dm Circuit BoardJumper/Header Locations, Top View S E T U PCC1000dm Setup C.C.1. 0. .0.0. D. .M. . .S.E.T. U. .PMultiple Option Selection JP3 Selection, JP3 CC1000dm SetupMultiple Option Jumper, JP3 Multiple Option JumperSignal CC1000dm SetupSignal Name SignalOperational Checks Power RequirementsO.P. E. R. .A. T. I.O. .N.A. .L. .C.H. E. .C.K. S Environmental ConsiderationsEPBADRST* 0 HSFAULT* Hot Swap Controller R.E.S. E. .T. .M. E. .T.H. O. .D.SReset Methods Basic Reset DiagramAny of the following methods reset the entire board Reset MethodsTroubleshooting T.R.O. U. .B. L. E. .S.H. O. .O. T. I. N. .GS E T U P TroubleshootingPMC/PCI INTERFACE P.C.I. .B.R. I.D. G. .E. .F.E. A. .T.U. R. .E.SP.M. .C. .M. .O.D. .U.L.E. .I.N. S. .T.A. L. L. .A.T.I.O. N PMC Module Installation Device MappingPMC Module Installation Timing InterruptsInternal Arbiter Control Register PMC Module InstallationRegister to… 1001 PCI 6254 has highest priority 1010-1111 reserved PMC Module InstallationBridge EEPROM B.R.I.D. G. .E. .E.E. P. .R.O. MPCI 6254 Configuration Registers Register PCI 6254 Configuration RegistersPCI6254 Configuration Registers Non-Transparent Mode P M C / P C I I N T E R F A C E10004281-02 PCI 6254 Configuration Registersreserved Secondary StatusP M C / P C I I N T E R F A C E PCI 6254 Configuration RegistersPCI Identification Values P.C.I. .I D. .E.N. .T.I .F.I C. .A. T. I.O. .N. .V. A. .L.U. E. .SJ .T.A.G. . H. .E.A. D. .E.R. S PCI Bus Control Signals P.C.I. .B.U. S. . C. .O. N. .T.R. O. .L. .S.I.G. N. .A.L. SPMC INTERRUPTS A, B, C, D lines are used to interrupt the CPU PCI Bus Control SignalsEach PMC expansion slot has four 64-pin connectors, see Table PMC Connector Pin AssignmentsPMCRSTOUT PMC Connector Pin AssignmentsJ2x PMC Connector Pin Assignments J13 J14 PinP M C / P C I I N T E R F A C E PMC Connector Pin AssignmentsD.A. T. A. . .B.U. F. .F.E.R. S CARRIER CARD BUS INTERFACEF.E.A. T. .U.R. E. .S Arbitration and Device Selection C.L.O. C. .K. .G. E. .N. E. R. .A.T. I.O. .NH.O. T. . S. .W. .A.P Hot Swap Hot Swap Controller HSC on the system board Staged backplane pinsHot Swap ImplementationCC1000dm Control Signals C.C.1. 0. .0.0. D. .M. . .C.O. N. .T.R. O. .L. .S.I.G. N. .A. L. SRow Z Backplane Connector Pin AssignmentsJ2 Connector Pin Assignments C A R R I E R C A R D B U S I N T E R F A C ERow B Backplane Connector Pin AssignmentsJ3 Connector Pin Assignments Row Z Row ARow A Backplane Connector Pin AssignmentsJ5 Connector Pin Assignments C A R R I E R C A R D B U S I N T E R F A C ERow C Backplane Connector Pin AssignmentsRow A Row BC A R R I E R C A R D B U S I N T E R F A C E Backplane Connector Pin AssignmentsETSI GLOSSARYASCII cPCI10004281-02 G l o s s a r yVital Product Data 5-2 CC1000dm User’s ManualNumerics INDEXI n d e Page International Sales & Support +44 131 CC1000dm User’s Manualw w w. a r t e s y n c p . c o m Madison, WI 53717-1935 USA