FIC A360 service manual System Core Logic, VIA TWISTER Features, Hardware Functional Overview

Models: A360

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4.5System Core Logic

Hardware Functional Overview

UPGA-2 packaging technology for thin form factor notebook designs. Exposed die enables more efficient heat dissipation.

Low-Power GTL+ processor system bus interface. 64-bit data bus, 100-MHz operation.

Integrated Intel Floating-Point Unit compatible with the IEEE Std 754

Integrated thermal diode measuring processor temperature.

4.5System Core Logic

The system core logic function of the notebook is implemented on the CPU module and motherboard using the VIA S3 Savage IX AGPset. The VIA S3 Savage IX AGPset is intended for the Pentium III processor platform and emerging 3D graphics/multimedia applications. The VIA S3 Savage IX AGPset brings 100/133-MHz FSB (front-side bus), ATA/33/66/100 HDD support in UDMA mode 2 & 4 and PC100/133 SDRAM performance to entry-level Performance PCs.

4.5.1VIA TWISTER Features

The VIA TWISTER Host Bridge provides a Host-to-PCI bridge, optimized DRAM controller and data path, and an Accelerated Graphics Port (AGP) interface. AGP is a high performance, component-level interconnect targeted at 3D graphics applications and is based on a set of performance enhancements to PCI.

The VIA TWISTER functions and capabilities include:

Define Integrated Solutions for Value PC Mobile Designs

Integrated VIA Apollo Pro133 and S3® Savaged IX in a single chip

64-bit Advanced Memory controller supporting PC100/PC133 SDRAM and VCM

Combines with VIA VT82C686B PCI-LPC South Bridge for state-of-the-art power management

High Performance CPU Interface

Socket 370 support for Intel Pentium III, Celeron™ processors

66/100/133 MHz CPU Front Side Bus (FSB)

Built-in Phase Lock Loop circuitry for optimal skew control within and between clocking regions

Five outstanding transactions (four In-Order Queue IOQ) plus one output latch)

Dynamic deferred transaction support

Advanced High Performance DRAM Controller

DRAM interface runs synchronous (66/66, 100/100, 133/133) mode or pseudo- synchronous (66/100, 100/66, 100/133, 133/100) mode with FSB

Concurrent CPU, AGP, and PCI access

Supports SDRAM and VCM SDRAM memory types

Support 3 DIMMs or 6 banks for up to 1.5 GB of DRAM (256Mb DRAM technology)

64-bit data width

Supports maximum 8-bank interleave (8 pages open simultaneously); banks are allocated based on LRU

SDRAM X-1-1-1-1-1-1-1 back-to-back accesses

FIC A360 Service Manual

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Page 109
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FIC A360 System Core Logic, VIA TWISTER Features, Hardware Functional Overview, High Performance CPU Interface