FIC service manual Software Functional Overview, 3-42, FIC A360 Service Manual, Stsx, data

Software Functional Overview

Function	Address	Register	R/W			Bit Number						Logic	Default Description
		Name		7	6	5	4	3	2	1	0

A0h

C

ADP_STS

R(/W)

RES[7:1]

O

-

-

CON = 1 :

AC adapter is connected

*3

N

BTP =1:

Battery trip point is

A1h

BAT1_STS

R(/W)

-

-

detected.

*3

(1st Battery)

EMP =1:

Battery is empty.

B

E

L

W

E

D

C

C

LOW =1:

Battery is Low battery

T

M

O

A

R

C

H O

WAR=1:

state.

A2h

BAT2_STS

P

P

W

R

R

H

G

N

ERR =1:

Battery is Warning state.

R(/W)

G

-

-

DCHG=1:

Battery is Error state.

*3

(2nd Battery)

CHG=1:

Battery is discharged.

CON=1:

Battery is charged.

Battery is connected.

A3h

Reserved

R/W

Don’t care

-

-

*3

A4h

BAT1_CAP

R(/W)

BCAP

-

-

0x00-0x64 = 0-100(%)

*3

0x7F

= Unknown

A5h

BAT2_CAP

R(/W)

BCAP

-

-

0x80

= Not installed

*3

A6h

Reserved

R/W

Don’t care

-

-

*3

SMBAlert output device address

The alert response function is

R

available when this register is cleared

SMB_Alert_

(0x00) only.

A7h

R/W

ADDRESS[6:0]

E

-

0x00

When the several devices assert the

ADDR

S

alert signal at the same time, the least

address is stored to this register. And

when

this register is cleared , next

Status

alert address is stored to this register.

A8h

GPIO-A_

R/W

STS_A [7:0]

Read

0x00

To clear the notified event flag without

*5

EVT_STS

0:No event

1:EVT

unexpected event

loss,

clear

the

A9h GPIO-B_

R/W

0

STS_B [6:0]

0x00

corresponding bit flag only.

*5

EVT_STS

detection

For this operation, this register has

Write

STS

special writing manner as follows.

AAh

GPIO-C_

R/W

0

0

0

0

0

0

_C

0:Clear

0x00

STS_X

 (STS_X) AND (Written

*5

EVT_STS

[1:0]

event

data)

1:Ignore

BTP2 =1:

BTP2 event is detected

ABh

RUN_

SMBus event is detected.

R/W

0x00

SMB =1 :

SMBAlert is detected.

*5

EVT_STS

ALRT=1 : GPIO event is detected.

B

A

G

B

B

GPIO =1 : Battery event is detected.

S

R

A

BATn=1 :

Battery event is detected.

T

L

P

A

A

P

M

R

I

E

T

T

D

Read

ADP =1 :

Thermal event is detected

B

S

P

TH

=1 :

High alarm point is

ACh

WAKE_

2

T

O

2

1

0:No event

HIGH=1 :

detected.

R/W

1:EVT

0x00

LOW =1 :

Low alarm point is

*5

EVT_STS

detection

ERR =1 :

detected.

Write

Polling communication

0:Clear

failure with retry.

ADh

RUN_

T

event

R/W

Reserved [7:1]

1:Ignore

0x00

To clear the notified event flag without

*5

EVT_STS_2

H

unexpected event loss, clear the

AEh

WAKE

R/W

Reserved [7:1]

T

0x00

corresponding bit flag only.

*5

EVT_STS_2

H

For this operation,

this

register

has

special writing manner as follows.

E

L

H

AFh

THERMAL_

Reserved

STS_X  (STS_X) AND (Written

R/W

R

O

I

0x00

data)

*5

EVT_STS

[7:3]

R

W

G

H

*3:

This register is not cleared if the system is in S4-S5 state.

*5:

After writing to this register, Set the “00h” to the BURST_FLG_CLR register.

R(/W): This is the read only register, but the written data will be able to read back till PMU

updates the data periodically, or PMU detects the status change.

3-42

FIC A360 Service Manual