Interrupt Control System Architecture | HP NuDAQ I-9111DG/HR

4.2Interrupt Control

4.2.1System Architecture

The PCI-9111‘s interrupt system is a powerful and flexible system which is suitable for A/D data acquisition and many applications. The system is a Dual Interrupt System. The dual interrupt means the hardware can generate two interrupt request signals in the same time and the software can service these two request signals by ISR. Note that the dual interrupt does not mean the card occupies two IRQ levels.

The two interrupt request signals (INT1 and INT2) come from digital input signals or the timer/counter output. An interrupt source multiplexer (MUX) is used to select the IRQ sources. Fig 4.2.1 shows the interrupt system.

INT1

INT1

AD EOC

IRQ

MUX

FIFO

PCI

Flip-

Half-full

Controller

Flops

INT #A

INT2

INT2

Pacer

MUX

External

Clear IRQ

IRQ

Figure 4.2.1 Dual Interrupt System of PCI-9111

4.2.2IRQ Level Setting

There is only one IRQ level is used by this card, although it is a dual interrupt system. This card uses INT #A interrupt request signal to PCI bus. The motherboard circuits will transfer INT #A to one of the AT bus IRQ levels. The IRQ level is set by the PCI plug and play BIOS and saved in the PCI controller. It is not necessary for users to set the IRQ level.

4.2.3Dual Interrupt System

The PCI controller of PCI-9111 can receive two hardware IRQ sources. However, a PCI controller can generate only one IRQ to PCI bus, the two IRQ sources must be distinguished by ISR of the application software if the two IRQ are all used.

The application software can use the “_9111_Get_Irq_Status” function to distinguish which interrupt is inserted. After servicing an IRQ signal,

Operation Theorem ∙31

Image 41

HP NuDAQ I-9111DG/HR manual Interrupt Control System Architecture, IRQ Level Setting, Dual Interrupt System

Contents

NuDAQ Trademarks Questions Getting service from AdlinkPage PCI PnP Registers Address Map Features Applications Specifications Software SupportingB l e o f C o n t e n t s Hardware Interrupt Clear Register Libraries Installation Programming GuideConversion Interrupt Control Table of Contents ∙ 9111util What do you need VR Assignment Adjustment How to Use This Guide Page Introduction Features Applications Specifications Unipolar 0~10V Bipolar -10V~+10V Programming Library Software Supporting PCIS-VEE HP-VEE Driver PCIS-LVIEW LabVIEW DriverDAQBenchTM ActiveX Controls DASYLabTM PRO PCIS-OPC OPC Server PCIS-ICL InControlTM Driver ∙ Software Installation Guide InstallationWhat You Have Unpacking PCB Layout of the PCI-9111 PCI-9111s Layout Jumper Descriptions Hardware Installation Outline ∙ CN 1 Digital Signal Input DI 0 ~ Device Installation for Windows SystemsConnectors Pin Assignment ∙ CN 3 Analog Input/Output, Extended I/O, Trigger Signals ∙ CN 2 Digital Signal Output do 0 ~ Connect with ACLD-8125 Daughter Board ConnectionConnect with ACLD-9137 Connect with ACLD-9182 PCI PnP Registers Registers Format A/D Data Registers I/O Address MapAddress Write Read I/O Address Address Base + 0h Attribute read only Data Format A/D Channel Control RegisterBit Address Base + 6h Attribute write only Data Format Bit A/D Channel Read Back Register A/D Input Signal Range Control RegisterAddress Base + 6h Attribute read only Data Format Bit Address Base + 8h Attribute write only Data Format Bit A/D Range and Status Read back Register A/D Trigger Mode Control RegisterAddress Base + 8h Attribute read only Data Format Bit Address Base + 0Ah Attribute write only Data Format Bit Address Base + 0Ch Attribute write only Data Format Bit Mode DescriptionAddress Base + 0Eh Attribute write only Data Format Bit Hardware Interrupt Clear Register 12 A/D Mode & Interrupt Control Read Back RegisterAddress Base + 48h Attribute write only Data Format Bit Address Base + 0Ah Attribute read only Data Format Bit Address Base + 2h Attribute read only Data Format Address Base + 4h Attribute write only Data Format BitAddress Base + 4h Attribute read only Data Format Bit Address Base + 40h ~ Base + 46h 15 D/A Output RegisterAddress Base + 2h Attribute write only Data Format Bit A/D Conversion Operation Theorem 2 A/D Signal Source Control 1 A/D Conversion Procedure Analog Input Signal Connection 3 A/D Trigger Source Control Signal Range External Trigger EITS=1, TPST=don‘t care 4 A/D Data Transfer Modes Fifo Half-Full Polling EOC Interrupt Transfer Pre-Trigger Control Time FFF 6 A/D Data Format Dual Interrupt System IRQ Level SettingInterrupt Control System Architecture Extended Digital I/O Port Interrupt Source Control 44mV 88mV D/A Conversion Digital Input and Output Timer/Counter Operation Introduction 4 I/O Address Pacer Trigger SourcePre-Trigger Counter ++ Library Libraries Installation Data Types Programming Guide Naming Convention 9111DO 9111Initial++ DOS ++ Windows 9111DI 9111DOChannel 9111EDI 9111DIChannel 10 9111EDOReadBack 9111EDO 11 9111SetEDOFunction 13 9111ADReadData 12 9111DA 15 9111ADSetChannel 14 9111ADReadDataRepeat 16 9111ADGetChannel Input Range Gain Gain Code 17 9111ADSetRange 19 9111ADGetStatus 18 9111ADGetRange 20 9111ADSetMode 22 9111INTSetReg 21 9111ADGetMode 23 9111INTGetReg 24 9111ResetFIFO 26 9111Set8254 25 9111ADSoftTrigger 27 9111Get8254 28 9111ADTimer 30 9111CounterRead 29 9111CounterStart 31 9111CounterStop 32 9111INTSourceControl 34 9111GetIRQChannel 33 9111CLRIRQ 36 9111ADFFHFPolling 35 9111GetIRQStatus 38 9111ADHRAquire 37 9111ADAquire 39 9111ADINTStart 40 9111ADFFHFINTStart ++ Library ∙61 42 9111ADFFHFINTStatus 41 9111ADINTStatus 43 9111ADFFHFINTRestart 44 9111ADINTStop What do you need Calibration Functions of VRs A/D AdjustmentVR Assignment Bipolar Analog Output D/A Adjustment Unipolar Analog Output Running 9111util.exe Software Utility9111util System Configuration Calibration Function Testing Menu Window Functional Testing Ieeprom Product Warranty/Service