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HP NuDAQ I-9111DG/HR A/D Channel Read Back Register, A/D Input Signal Range Control Register

Models: NuDAQ I-9111DG/HR

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3.5A/D Channel Read Back Register

The AD channel setting can be read back from this register.

Address: BASE + 6h

Attribute: read only

Data Format:

Bit	7	6	5	4	3	2	1	0

BASE+6h	AS3	AS2	AS1	AS0	CN3	CN2	CN1	CN0
BASE+7h	--	--	--	--	--	--	--	--

Where:

CNn: channel number

ASn: Auto scan channel number.

There are 8 bits in this register. Under non-auto scan mode, the 4 LSBs (CN0~CN3) show thechannel number setting and the 4 MSBs (AS3~AS0) is all ‘0’. Under auto-scan mode, the 4LSBs record the ending channel number. The 4 MSBs is the selected channel, and the value will increase automatically if any A/D trigger signal is inserted.

3.6A/D Input Signal Range Control Register

The A/D range register is used to adjust the analog input ranges. This register directly controls the PGA (programmable gain amplifier). When a different gain value is set, the analog input range will be changed to the its corresponding value.

Address: BASE + 8h

Attribute: write only

Data Format:

Bit	7	6	5	4	3	2	1	0

BASE+8h	X	X	X	X	X	G2	G1	G0
BASE+9h	X	X	X	X	X	X	X	X

The relationship between gain setting and its corresponding A/D range is listed in the table below.

	G2	G1	G0	GAIN	Analog Input Range	Gain Code used in
	G2	G1	G0	GAIN	Analog Input Range	Software Library
						Software Library

	0	0	0	1	±10V	AD_B_10_V
	0	0	1	2	±5V	AD_B_5_v
	0	1	0	4	±2.5V	AD_B_2_5_V
	0	1	1	8	±1.25V	AD_B_1_25_v
	1	0	0	16	±0.625V	AD_B_0_625_V

16 ∙ Registers Format

Image 26

HP NuDAQ I-9111DG/HR manual A/D Channel Read Back Register, A/D Input Signal Range Control Register

Contents

NuDAQ Trademarks Getting service from Adlink QuestionsPage PCI PnP Registers Address Map Features Applications Specifications Software SupportingB l e o f C o n t e n t s Conversion Libraries Installation Programming GuideHardware Interrupt Clear Register Interrupt Control Table of Contents ∙ What do you need VR Assignment Adjustment 9111util How to Use This Guide Page Features Introduction Specifications Applications Unipolar 0~10V Bipolar -10V~+10V Software Supporting Programming Library DAQBenchTM ActiveX Controls PCIS-LVIEW LabVIEW DriverPCIS-VEE HP-VEE Driver DASYLabTM PRO PCIS-ICL InControlTM Driver PCIS-OPC OPC Server What You Have Installation∙ Software Installation Guide Unpacking PCI-9111s Layout PCB Layout of the PCI-9111 Hardware Installation Outline Jumper Descriptions ∙ CN 1 Digital Signal Input DI 0 ~ Device Installation for Windows SystemsConnectors Pin Assignment ∙ CN 2 Digital Signal Output do 0 ~ ∙ CN 3 Analog Input/Output, Extended I/O, Trigger Signals Connect with ACLD-9137 Daughter Board ConnectionConnect with ACLD-8125 Connect with ACLD-9182 Registers Format PCI PnP Registers Address Write Read I/O Address MapA/D Data Registers I/O Address Bit A/D Channel Control RegisterAddress Base + 0h Attribute read only Data Format Address Base + 6h Attribute write only Data Format Bit Address Base + 6h Attribute read only Data Format Bit A/D Input Signal Range Control RegisterA/D Channel Read Back Register Address Base + 8h Attribute write only Data Format Bit Address Base + 8h Attribute read only Data Format Bit A/D Trigger Mode Control RegisterA/D Range and Status Read back Register Address Base + 0Ah Attribute write only Data Format Bit Address Base + 0Ch Attribute write only Data Format Bit Mode DescriptionAddress Base + 0Eh Attribute write only Data Format Bit Address Base + 48h Attribute write only Data Format Bit 12 A/D Mode & Interrupt Control Read Back RegisterHardware Interrupt Clear Register Address Base + 0Ah Attribute read only Data Format Bit Address Base + 2h Attribute read only Data Format Address Base + 4h Attribute write only Data Format BitAddress Base + 4h Attribute read only Data Format Bit Address Base + 40h ~ Base + 46h 15 D/A Output RegisterAddress Base + 2h Attribute write only Data Format Bit Operation Theorem A/D Conversion 1 A/D Conversion Procedure 2 A/D Signal Source Control Analog Input Signal Connection Signal Range 3 A/D Trigger Source Control 4 A/D Data Transfer Modes External Trigger EITS=1, TPST=don‘t care Fifo Half-Full Polling Pre-Trigger Control EOC Interrupt Transfer Time 6 A/D Data Format FFF Dual Interrupt System IRQ Level SettingInterrupt Control System Architecture Interrupt Source Control Extended Digital I/O Port D/A Conversion 44mV 88mV Timer/Counter Operation Introduction Digital Input and Output 4 I/O Address Pacer Trigger SourcePre-Trigger Counter Libraries Installation ++ Library Programming Guide Naming Convention Data Types ++ DOS 9111Initial9111DO ++ Windows 9111DOChannel 9111DI 9111DIChannel 9111EDI 9111EDO 10 9111EDOReadBack 11 9111SetEDOFunction 12 9111DA 13 9111ADReadData 14 9111ADReadDataRepeat 15 9111ADSetChannel 16 9111ADGetChannel 17 9111ADSetRange Input Range Gain Gain Code 18 9111ADGetRange 19 9111ADGetStatus 20 9111ADSetMode 21 9111ADGetMode 22 9111INTSetReg 24 9111ResetFIFO 23 9111INTGetReg 25 9111ADSoftTrigger 26 9111Set8254 28 9111ADTimer 27 9111Get8254 29 9111CounterStart 30 9111CounterRead 31 9111CounterStop 32 9111INTSourceControl 33 9111CLRIRQ 34 9111GetIRQChannel 35 9111GetIRQStatus 36 9111ADFFHFPolling 37 9111ADAquire 38 9111ADHRAquire 39 9111ADINTStart 40 9111ADFFHFINTStart ++ Library ∙61 41 9111ADINTStatus 42 9111ADFFHFINTStatus 43 9111ADFFHFINTRestart 44 9111ADINTStop Calibration What do you need Functions of VRs A/D AdjustmentVR Assignment D/A Adjustment Unipolar Analog Output Bipolar Analog Output Running 9111util.exe Software Utility9111util System Configuration Calibration Functional Testing Function Testing Menu Window Ieeprom Product Warranty/Service