6 A/D Data Format, Fff | HP NuDAQ I-9111DG/HR manual

4.1.6A/D Data Format

The A/D data read from the FIFO is in the two‘s complement format. As the A/D gain is 1, the A/D signal range is roughly +10V ~ -10V bi-polar. In PCI-9111HR, the whole 16 bits A/D data are available. The relationship between voltage and the A/D data value is shown in the following table:

	A/D Data (Hex)	Decimal Value	Voltage (Volts)
	7FFF	+32767	+9.99969
	4000	+16384	+5.00000
	0001	1	+0.00031
	0000	0	0.00000
	FFFF	-1	-0.00031
	C000	-16384	-5.00000
	8001	-32767	-9.99969
	8000	-32768	-10.00031

Note: the decimal value of the A/D data is in the same sign with the bi-polar voltage. Therefore, the sign extension conversion is not necessary.

The A/D converted data of 12 bits PCI-9111DG is on the 12 MSBs of the A/D data. The 4 LSB of the 16 bits A/D data are the channel number and must be truncated by software. The relationship between voltage and the A/D converted data value is shown in the following table:

	A/D Converted	Decimal Value	Voltage (Volts)
	Data (Hex)	Decimal Value	Voltage (Volts)
	Data (Hex)
	7FF	+2047	+9.9951
	400	+1024	+5.0000
	001	+1	+0.0049
	000	0	0.0000
	FFF	-1	-0.0049
	C00	-1024	-5.0000
	801	-2047	-9.9951
	800	-2048	-10.0000

The formula between the A/D converted data and the voltage value is:

Voltage = AD_ data × 1 × 10

K gain

where gain is the value of the A/D gain control register. K=32768 for PCI-9111HR, and K=2048 for PCI-9111DG.

30 ∙ Operation Theorem

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HP NuDAQ I-9111DG/HR manual 6 A/D Data Format, Fff

Contents

NuDAQ Trademarks Getting service from Adlink QuestionsPage B l e o f C o n t e n t s Features Applications Specifications Software SupportingPCI PnP Registers Address Map Libraries Installation Programming Guide Hardware Interrupt Clear RegisterConversion Interrupt Control Table of Contents ∙ What do you need VR Assignment Adjustment 9111util How to Use This Guide Page Features Introduction Specifications Applications Unipolar 0~10V Bipolar -10V~+10V Software Supporting Programming Library PCIS-LVIEW LabVIEW Driver PCIS-VEE HP-VEE DriverDAQBenchTM ActiveX Controls DASYLabTM PRO PCIS-ICL InControlTM Driver PCIS-OPC OPC Server Installation ∙ Software Installation GuideWhat You Have Unpacking PCI-9111s Layout PCB Layout of the PCI-9111 Hardware Installation Outline Jumper Descriptions Connectors Pin Assignment Device Installation for Windows Systems∙ CN 1 Digital Signal Input DI 0 ~ ∙ CN 2 Digital Signal Output do 0 ~ ∙ CN 3 Analog Input/Output, Extended I/O, Trigger Signals Daughter Board Connection Connect with ACLD-8125Connect with ACLD-9137 Connect with ACLD-9182 Registers Format PCI PnP Registers I/O Address Map A/D Data RegistersAddress Write Read I/O Address A/D Channel Control Register Address Base + 0h Attribute read only Data FormatBit Address Base + 6h Attribute write only Data Format Bit A/D Input Signal Range Control Register A/D Channel Read Back RegisterAddress Base + 6h Attribute read only Data Format Bit Address Base + 8h Attribute write only Data Format Bit A/D Trigger Mode Control Register A/D Range and Status Read back RegisterAddress Base + 8h Attribute read only Data Format Bit Address Base + 0Ah Attribute write only Data Format Bit Address Base + 0Eh Attribute write only Data Format Bit Mode DescriptionAddress Base + 0Ch Attribute write only Data Format Bit 12 A/D Mode & Interrupt Control Read Back Register Hardware Interrupt Clear RegisterAddress Base + 48h Attribute write only Data Format Bit Address Base + 0Ah Attribute read only Data Format Bit Address Base + 4h Attribute read only Data Format Bit Address Base + 4h Attribute write only Data Format BitAddress Base + 2h Attribute read only Data Format Address Base + 2h Attribute write only Data Format Bit 15 D/A Output RegisterAddress Base + 40h ~ Base + 46h Operation Theorem A/D Conversion 1 A/D Conversion Procedure 2 A/D Signal Source Control Analog Input Signal Connection Signal Range 3 A/D Trigger Source Control 4 A/D Data Transfer Modes External Trigger EITS=1, TPST=don‘t care Fifo Half-Full Polling Pre-Trigger Control EOC Interrupt Transfer Time 6 A/D Data Format FFF Interrupt Control System Architecture IRQ Level SettingDual Interrupt System Interrupt Source Control Extended Digital I/O Port D/A Conversion 44mV 88mV Timer/Counter Operation Introduction Digital Input and Output Pre-Trigger Counter Pacer Trigger Source4 I/O Address Libraries Installation ++ Library Programming Guide Naming Convention Data Types 9111Initial 9111DO++ DOS ++ Windows 9111DOChannel 9111DI 9111DIChannel 9111EDI 9111EDO 10 9111EDOReadBack 11 9111SetEDOFunction 12 9111DA 13 9111ADReadData 14 9111ADReadDataRepeat 15 9111ADSetChannel 16 9111ADGetChannel 17 9111ADSetRange Input Range Gain Gain Code 18 9111ADGetRange 19 9111ADGetStatus 20 9111ADSetMode 21 9111ADGetMode 22 9111INTSetReg 24 9111ResetFIFO 23 9111INTGetReg 25 9111ADSoftTrigger 26 9111Set8254 28 9111ADTimer 27 9111Get8254 29 9111CounterStart 30 9111CounterRead 31 9111CounterStop 32 9111INTSourceControl 33 9111CLRIRQ 34 9111GetIRQChannel 35 9111GetIRQStatus 36 9111ADFFHFPolling 37 9111ADAquire 38 9111ADHRAquire 39 9111ADINTStart 40 9111ADFFHFINTStart ++ Library ∙61 41 9111ADINTStatus 42 9111ADFFHFINTStatus 43 9111ADFFHFINTRestart 44 9111ADINTStop Calibration What do you need VR Assignment A/D AdjustmentFunctions of VRs D/A Adjustment Unipolar Analog Output Bipolar Analog Output 9111util Software UtilityRunning 9111util.exe System Configuration Calibration Functional Testing Function Testing Menu Window Ieeprom Product Warranty/Service