Time | HP NuDAQ I-9111DG/HR guide

software must continuously read data out from the FIFO to prevent FIFO full. The software also should poll the counter value to check if the A/D sampling is stopped.

To set up the Pre-Trigger mode, the following steps should be followed:

1.Set Pre-Trigger Mode Off: PTRG = OFF.

2.Set 8254 Counter #0 value N (N=1~65535). Note that the larger the counter value, the more host memory buffer is needed.

3.Set up A/D data acquire, including, A/D range, channel scan, data transfer mode and so on.

4.Set Pre-Trigger Mode On: PTRG = ON.

5.Read A/D data into host PC memory buffer by certain data transfer method, otherwise the FIFO will full. At the same time, wait the pre-trigger signal and check if the 8254 Counter # 0 value is down to zero.

6.If A/D is stopped, set the Pre-Trigger Mode off and process the data which stored in the host memory.

7.Go to Step 1 to set the Pre-Trigger mode and wait the next pre-trigger event.

The Pre-Trigger timing is shown as following:

Set Pre-Trigger			External Pre-Trigger			A/D Data
	mode		Signal is Inserted			Acquisition Stop
					Counter # 0 counting
					from N down to 0

									Time
	Acquire Infinite A/D data before				Acquire N A/D data after				Time
					Acquire N A/D data after
					Pre-trigger Signal is Inserted
	Pre-Trigger Signal is Inserted				Pre-trigger Signal is Inserted
	Pre-Trigger Signal is Inserted

If the application acquires data after the pre-trigger signal, only the last N data need to be stored. The maximum value of N is 65535. If the application only needs to acquire data before the pre-trigger signal, set N=1 then just one more data will be sampled after pre-trigger signal and infinite data before pre-trigger signal can be stored.

Operation Theorem ∙29

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HP NuDAQ I-9111DG/HR manual Time

Contents

NuDAQ Trademarks Questions Getting service from AdlinkPage Features Applications Specifications Software Supporting B l e o f C o n t e n t sPCI PnP Registers Address Map Interrupt Control Libraries Installation Programming GuideHardware Interrupt Clear Register Conversion Table of Contents ∙ 9111util What do you need VR Assignment Adjustment How to Use This Guide Page Introduction Features Applications Specifications Unipolar 0~10V Bipolar -10V~+10V Programming Library Software Supporting DASYLabTM PRO PCIS-LVIEW LabVIEW DriverPCIS-VEE HP-VEE Driver DAQBenchTM ActiveX Controls PCIS-OPC OPC Server PCIS-ICL InControlTM Driver Unpacking Installation∙ Software Installation Guide What You Have PCB Layout of the PCI-9111 PCI-9111s Layout Jumper Descriptions Hardware Installation Outline Device Installation for Windows Systems Connectors Pin Assignment∙ CN 1 Digital Signal Input DI 0 ~ ∙ CN 3 Analog Input/Output, Extended I/O, Trigger Signals ∙ CN 2 Digital Signal Output do 0 ~ Connect with ACLD-9182 Daughter Board ConnectionConnect with ACLD-8125 Connect with ACLD-9137 PCI PnP Registers Registers Format I/O Address I/O Address MapA/D Data Registers Address Write Read Address Base + 6h Attribute write only Data Format Bit A/D Channel Control RegisterAddress Base + 0h Attribute read only Data Format Bit Address Base + 8h Attribute write only Data Format Bit A/D Input Signal Range Control RegisterA/D Channel Read Back Register Address Base + 6h Attribute read only Data Format Bit Address Base + 0Ah Attribute write only Data Format Bit A/D Trigger Mode Control RegisterA/D Range and Status Read back Register Address Base + 8h Attribute read only Data Format Bit Mode Description Address Base + 0Eh Attribute write only Data Format BitAddress Base + 0Ch Attribute write only Data Format Bit Address Base + 0Ah Attribute read only Data Format Bit 12 A/D Mode & Interrupt Control Read Back RegisterHardware Interrupt Clear Register Address Base + 48h Attribute write only Data Format Bit Address Base + 4h Attribute write only Data Format Bit Address Base + 4h Attribute read only Data Format BitAddress Base + 2h Attribute read only Data Format 15 D/A Output Register Address Base + 2h Attribute write only Data Format BitAddress Base + 40h ~ Base + 46h A/D Conversion Operation Theorem 2 A/D Signal Source Control 1 A/D Conversion Procedure Analog Input Signal Connection 3 A/D Trigger Source Control Signal Range External Trigger EITS=1, TPST=don‘t care 4 A/D Data Transfer Modes Fifo Half-Full Polling EOC Interrupt Transfer Pre-Trigger Control Time FFF 6 A/D Data Format IRQ Level Setting Interrupt Control System ArchitectureDual Interrupt System Extended Digital I/O Port Interrupt Source Control 44mV 88mV D/A Conversion Digital Input and Output Timer/Counter Operation Introduction Pacer Trigger Source Pre-Trigger Counter4 I/O Address ++ Library Libraries Installation Data Types Programming Guide Naming Convention ++ Windows 9111Initial9111DO ++ DOS 9111DI 9111DOChannel 9111EDI 9111DIChannel 10 9111EDOReadBack 9111EDO 11 9111SetEDOFunction 13 9111ADReadData 12 9111DA 15 9111ADSetChannel 14 9111ADReadDataRepeat 16 9111ADGetChannel Input Range Gain Gain Code 17 9111ADSetRange 19 9111ADGetStatus 18 9111ADGetRange 20 9111ADSetMode 22 9111INTSetReg 21 9111ADGetMode 23 9111INTGetReg 24 9111ResetFIFO 26 9111Set8254 25 9111ADSoftTrigger 27 9111Get8254 28 9111ADTimer 30 9111CounterRead 29 9111CounterStart 31 9111CounterStop 32 9111INTSourceControl 34 9111GetIRQChannel 33 9111CLRIRQ 36 9111ADFFHFPolling 35 9111GetIRQStatus 38 9111ADHRAquire 37 9111ADAquire 39 9111ADINTStart 40 9111ADFFHFINTStart ++ Library ∙61 42 9111ADFFHFINTStatus 41 9111ADINTStatus 43 9111ADFFHFINTRestart 44 9111ADINTStop What do you need Calibration A/D Adjustment VR AssignmentFunctions of VRs Bipolar Analog Output D/A Adjustment Unipolar Analog Output Software Utility 9111utilRunning 9111util.exe System Configuration Calibration Function Testing Menu Window Functional Testing Ieeprom Product Warranty/Service