Intel 7xx Servers Model 170 Servers Current 170 Servers, Table C.12.2.1 Current Model 170 Servers

Model	Chip Speed	L2 cache	CPUs	Processor CPW	Interactive CPW	Interactive CPW
	MHz	per CPU			(Knee)	(Max)
720-2064 (1504)	255	4 MB	4	1600	560	653.3
720-2064 (1505)	255	4 MB	4	1600	1050	1225
730-2065 (Base)	262	4 MB	1	560	70	81.7
730-2065 (1507)	262	4 MB	1	560	120	140
730-2065 (1508)	262	4 MB	1	560	240	280
730-2065 (1509)	262	4 MB	1	560	560	653.3
730-2066 (Base)	262	4 MB	2	1050	70	81.7
730-2066 (1507)	262	4 MB	2	1050	120	140
730-2066 (1508)	262	4 MB	2	1050	240	280
730-2066 (1509)	262	4 MB	2	1050	560	653.3
730-2066 (1510)	262	4 MB	2	1050	1050	1225
730-2067 (Base)	262	4 MB	4	2000	70	81.7
730-2067 (1508)	262	4 MB	4	2000	240	280
730-2067 (1509)	262	4 MB	4	2000	560	653.3
730-2067 (1510)	262	4 MB	4	2000	1050	1225
730-2067 (1511)	262	4 MB	4	2000	2000	2333.3
730-2068 (Base)	262	4 MB	8	2890	70	81.7
730-2068 (1508)	262	4 MB	8	2890	240	280
730-2068 (1509)	262	4 MB	8	2890	560	653.3
730-2068 (1510)	262	4 MB	8	2890	1050	1225
730-2068 (1511)	262	4 MB	8	2890	2000	2333.3
740-2069 (Base)	262	8 MB	8	3660	120	140
740-2069 (1510)	262	8 MB	8	3660	1050	1225
740-2069 (1511)	262	8 MB	8	3660	2000	2333.3
740-2069 (1512)	262	8 MB	8	3660	3660	4270
740-2070 (Base)	262	8 MB	12	4550	120	140
740-2070 (1510)	262	8 MB	12	4550	1050	1225
740-2070 (1511)	262	8 MB	12	4550	2000	2333.3
740-2070 (1512)	262	8 MB	12	4550	3660	4270
740-2070 (1513)	262	8 MB	12	4550	4550	5308.3

C.12.2 Model 170 Servers

Current 170 Servers

MAX Interactive CPW = Interactive CPW (Knee) * 7/6
CPU % used by Interactive @ Knee = Interactive CPW (Knee) / Processor CPW * 100
CPU % used by Processor				@ Knee = 100 - CPU % used by Interactive @ Knee
CPU % used by Interactive @ Max = Max Interactive CPW / Processor CPW * 100
	Table C.12.2.1 Current Model 170 Servers
			Chip	L2 cache	Processor	Interactive	Interactive	Processor	Interactive	Interactive
	Feature #	CPUs				CPW	CPW	CPU %	CPU %	CPU %
			Speed	per CPU	CPW
						(Knee)	(Max)	@ Knee	@ Knee	@ Max
	2289	1	200 MHz	n/a	50	15	17.5	70	30	35
	2290	1	200 MHz	n/a	73	20	23.3	72.6	27.4	32
	2291	1	200 MHz	n/a	115	25	29.2	78.3	21.7	25.4
	2292	1	200 MHz	n/a	220	30	35	86.4	13.6	15.9
	2385	1	252 MHz	4 MB	460	50	58.3	89.1	10.9	12.7
	2386	1	252 MHz	4 MB	460	70	81.7	84.8	15.2	17.8
	2388	2	255 MHz	4 MB	1090	70	81.7	92.3	6.4	7.5
IBM i 6.1 Performance Capabilities Reference - January/April/October 2008
© Copyright IBM Corp. 2008				Appendix C CPW, CIW and MCU for System i Platform						362