Intel 170 Servers, AS/400 RISC Server, 7xx Servers manual V6R1 Additions October

C.1 V6R1 Additions (October 2008)

C.1.1 CPW values for the IBM Power Systems - IBM i operating system

Table C.1.1. CPW values for Power System Models

						Processor CPW
Model	Processor	Chip Speed	L2/L3 cache (1)	2 cores	4 cores		8 cores	12 cores	16 cores
	Feature	GHz	per chip
570 (9117-MMA)	7387	4.4	2x4MB / 32MB	9850	19400		36200	51500	70000
570 (9117-MMA)	7388	5.0	2x4MB / 32MB	11000	21600		40300	56800	77600

*Note: 1. These models have a dedicated L2 cache per processor core, and share the L3 cache between two processor cores.

2.Memory speed differences account for some slight variations in performance difference between models.

3.CPW values for Power System models introduced in October 2008 were based on IBM i 6.1 plus enhancements in post-release PTFs.

C.1.2 CPW values for the IBM Power Systems - IBM i operating system

Table C.1.2. CPW values for Power System Models

					Processor CPW
Model	Processor	Chip Speed	L2/L3 cache (1)	4 cores	8 cores	16 cores	24 cores	32 cores
	Feature	GHz	per chip
570 (9117-MMA)	7540	4.2	2x4MB / 32MB	16200	31900	56400	81600	104800

*Note: 1. These models have a dedicated L2 cache per processor core, and share the L3 cache between two processor cores.

2.Memory speed differences account for some slight variations in performance difference between models.

3.For large partitions, some workloads may experience nonlinear scaling at high system utilization on these new models.

4.CPW values for Power System models introduced in October 2008 were based on IBM i 6.1 plus enhancements in post-release PTFs.

C.1.3 CPW values for IBM Power Systems - IBM i operating system

Table C.1.3. CPW values for Power System Models

				Processor CPW
Model	Processor	Chip Speed	L2/L3 cache (1)	4 cores	8 cores	16 cores
	Feature	GHz	per chip

560 (8234-EMA)

7537

3.6

2x4MB / 32MB 14100

27600

48500

*Note: 1. These models have a dedicated L2 cache per processor core, and share the L3 cache between two processor cores.

IBM i 6.1 Performance Capabilities Reference - January/April/October 2008
© Copyright IBM Corp. 2008	Appendix C CPW, CIW and MCU for System i Platform	345