327Chapter 21. High Availability Performance ........................................... 325
20.6 Aligning Floating Point Data on Power6 ........................................... 324
20.5 POWER6 520 Memory Considerations ............................................ 323
Models With/Without HMT ....................................................... 323
HMT and SMT Compared and Contrasted ........................................... 322
HMT Described ............................................................... 322
20.4 Hardware Multi-threading (HMT) ................................................ 321
A Final Thought About Memory and Competitiveness .................................. 321
A Short but Important Tip about Data Base .......................................... 320
Which is more important? ....................................................... 319
A Brief Example ............................................................... 318
Typical Storage Costs ........................................................... 318
System Level Considerations ..................................................... 317
Theory -- and Practice .......................................................... 317
20.3 How to Design for Minimum Main Storage Use (especially with Java, C, C++) ............. 316
20.2 General Performance Guidelines -- Effects of Compilation ............................. 314
20.1 Adjusting Your Performance Tuning for Threads .................................... 314Chapter 20. General Performance Tips and Techniques ............................... 311
19.7 AS/400 NetFinity Capacity Planning .............................................. 310
19.6 User Pool Faulting Guidelines ................................................... 308
19.5 Additional Memory Tuning Techniques ........................................... 307
19.4 Memory Tuning Using the QPFRADJ System Value ................................. 307
19.3 Main Storage Sizing Guidelines ................................................. 304
19.2 Dynamic Priority Scheduling .................................................... 302
19.1 Public Benchmarks (TPC-C, SAP, NotesBench, SPECjbb2000, VolanoMark) ............. 302Chapter 19. Miscellaneous Performance Information .................................. 301
18.5 Summary .................................................................... 300
18.4 LPAR Measurements .......................................................... 297
18.3 Performance on a 12-way system ................................................. 296
18.2 Considerations ................................................................ 296
V5R1 Additions ................................................................ 295
General Tips .................................................................. 295
V5R2 Additions ................................................................ 295
V5R3 Information .............................................................. 295
18.1 Introduction .................................................................. 295Chapter 18. Logical Partitioning (LPAR) ............................................ 293
17.9 Additional Sources of Information ................................................ 293
17.8 Summary .................................................................... 292
17.7 File Level Backup Performance .................................................. 291
17.6.3 Windows CPU Cost ....................................................... 291
17.6.2 VE CPW Cost ........................................................... 290
17.6.1 VE Capacity Comparisons ................................................. 289
17.6 Virtual Ethernet CPU Cost and Capacities .......................................... 288
17.5 Disk I/O Throughput ........................................................... 287
17.4.1 Further notes about IXS/IXA Disk Operations .................................. 286
17.4 Disk I/O CPU Cost ............................................................ 285
17.3.2 iSCSI attached servers: .................................................... 285
17.3.1 IXS and IXA attached servers: ............................................... 285
17.3 System i memory rules of thumb for IXS/IXA and iSCSI attached servers. ................ 285
17.2.5 IXS/IXA IOP Resource: ................................................... 284
17.2.4 Virtual Ethernet Connections: ..............................................
IBM i 6.1 Performance Capabilities Reference - January/April/October 2008
© Copyright IBM Corp. 2008 IBM i Performance Capabilities 8